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TheRock/compiler/amd-llvm/llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll
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derek.holloway 7502bf64a4
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243 lines
8.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v,+zvfbfmin -target-abi=ilp32d \
; RUN: -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v,+zvfbfmin -target-abi=lp64d \
; RUN: -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+v,+zvfbfmin -target-abi=ilp32d \
; RUN: -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+v,+zvfbfmin -target-abi=lp64d \
; RUN: -verify-machineinstrs < %s | FileCheck %s
define <vscale x 1 x half> @vfptrunc_nxv1f32_nxv1f16(<vscale x 1 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv1f32_nxv1f16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v9, v8
; CHECK-NEXT: vmv1r.v v8, v9
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 1 x float> %va to <vscale x 1 x half>
ret <vscale x 1 x half> %evec
}
define <vscale x 2 x half> @vfptrunc_nxv2f32_nxv2f16(<vscale x 2 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv2f32_nxv2f16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v9, v8
; CHECK-NEXT: vmv1r.v v8, v9
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 2 x float> %va to <vscale x 2 x half>
ret <vscale x 2 x half> %evec
}
define <vscale x 4 x half> @vfptrunc_nxv4f32_nxv4f16(<vscale x 4 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv4f32_nxv4f16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v10, v8
; CHECK-NEXT: vmv.v.v v8, v10
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 4 x float> %va to <vscale x 4 x half>
ret <vscale x 4 x half> %evec
}
define <vscale x 8 x half> @vfptrunc_nxv8f32_nxv8f16(<vscale x 8 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv8f32_nxv8f16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v12, v8
; CHECK-NEXT: vmv.v.v v8, v12
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 8 x float> %va to <vscale x 8 x half>
ret <vscale x 8 x half> %evec
}
define <vscale x 16 x half> @vfptrunc_nxv16f32_nxv16f16(<vscale x 16 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv16f32_nxv16f16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v16, v8
; CHECK-NEXT: vmv.v.v v8, v16
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 16 x float> %va to <vscale x 16 x half>
ret <vscale x 16 x half> %evec
}
define <vscale x 1 x half> @vfptrunc_nxv1f64_nxv1f16(<vscale x 1 x double> %va) {
;
; CHECK-LABEL: vfptrunc_nxv1f64_nxv1f16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
; CHECK-NEXT: vfncvt.rod.f.f.w v9, v8
; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v8, v9
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 1 x double> %va to <vscale x 1 x half>
ret <vscale x 1 x half> %evec
}
define <vscale x 1 x float> @vfptrunc_nxv1f64_nxv1f32(<vscale x 1 x double> %va) {
;
; CHECK-LABEL: vfptrunc_nxv1f64_nxv1f32:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v9, v8
; CHECK-NEXT: vmv1r.v v8, v9
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 1 x double> %va to <vscale x 1 x float>
ret <vscale x 1 x float> %evec
}
define <vscale x 2 x half> @vfptrunc_nxv2f64_nxv2f16(<vscale x 2 x double> %va) {
;
; CHECK-LABEL: vfptrunc_nxv2f64_nxv2f16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; CHECK-NEXT: vfncvt.rod.f.f.w v10, v8
; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v8, v10
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 2 x double> %va to <vscale x 2 x half>
ret <vscale x 2 x half> %evec
}
define <vscale x 2 x float> @vfptrunc_nxv2f64_nxv2f32(<vscale x 2 x double> %va) {
;
; CHECK-LABEL: vfptrunc_nxv2f64_nxv2f32:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v10, v8
; CHECK-NEXT: vmv.v.v v8, v10
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 2 x double> %va to <vscale x 2 x float>
ret <vscale x 2 x float> %evec
}
define <vscale x 4 x half> @vfptrunc_nxv4f64_nxv4f16(<vscale x 4 x double> %va) {
;
; CHECK-LABEL: vfptrunc_nxv4f64_nxv4f16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; CHECK-NEXT: vfncvt.rod.f.f.w v12, v8
; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v8, v12
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 4 x double> %va to <vscale x 4 x half>
ret <vscale x 4 x half> %evec
}
define <vscale x 4 x float> @vfptrunc_nxv4f64_nxv4f32(<vscale x 4 x double> %va) {
;
; CHECK-LABEL: vfptrunc_nxv4f64_nxv4f32:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v12, v8
; CHECK-NEXT: vmv.v.v v8, v12
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 4 x double> %va to <vscale x 4 x float>
ret <vscale x 4 x float> %evec
}
define <vscale x 8 x half> @vfptrunc_nxv8f64_nxv8f16(<vscale x 8 x double> %va) {
;
; CHECK-LABEL: vfptrunc_nxv8f64_nxv8f16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; CHECK-NEXT: vfncvt.rod.f.f.w v16, v8
; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v8, v16
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 8 x double> %va to <vscale x 8 x half>
ret <vscale x 8 x half> %evec
}
define <vscale x 8 x float> @vfptrunc_nxv8f64_nxv8f32(<vscale x 8 x double> %va) {
;
; CHECK-LABEL: vfptrunc_nxv8f64_nxv8f32:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; CHECK-NEXT: vfncvt.f.f.w v16, v8
; CHECK-NEXT: vmv.v.v v8, v16
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 8 x double> %va to <vscale x 8 x float>
ret <vscale x 8 x float> %evec
}
define <vscale x 1 x bfloat> @vfptrunc_nxv1f32_nxv1bf16(<vscale x 1 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv1f32_nxv1bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
; CHECK-NEXT: vfncvtbf16.f.f.w v9, v8
; CHECK-NEXT: vmv1r.v v8, v9
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 1 x float> %va to <vscale x 1 x bfloat>
ret <vscale x 1 x bfloat> %evec
}
define <vscale x 2 x bfloat> @vfptrunc_nxv2f32_nxv2bf16(<vscale x 2 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv2f32_nxv2bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; CHECK-NEXT: vfncvtbf16.f.f.w v9, v8
; CHECK-NEXT: vmv1r.v v8, v9
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 2 x float> %va to <vscale x 2 x bfloat>
ret <vscale x 2 x bfloat> %evec
}
define <vscale x 4 x bfloat> @vfptrunc_nxv4f32_nxv4bf16(<vscale x 4 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv4f32_nxv4bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; CHECK-NEXT: vfncvtbf16.f.f.w v10, v8
; CHECK-NEXT: vmv.v.v v8, v10
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 4 x float> %va to <vscale x 4 x bfloat>
ret <vscale x 4 x bfloat> %evec
}
define <vscale x 8 x bfloat> @vfptrunc_nxv8f32_nxv8bf16(<vscale x 8 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv8f32_nxv8bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; CHECK-NEXT: vfncvtbf16.f.f.w v12, v8
; CHECK-NEXT: vmv.v.v v8, v12
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 8 x float> %va to <vscale x 8 x bfloat>
ret <vscale x 8 x bfloat> %evec
}
define <vscale x 16 x bfloat> @vfptrunc_nxv16f32_nxv16bf16(<vscale x 16 x float> %va) {
;
; CHECK-LABEL: vfptrunc_nxv16f32_nxv16bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; CHECK-NEXT: vfncvtbf16.f.f.w v16, v8
; CHECK-NEXT: vmv.v.v v8, v16
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 16 x float> %va to <vscale x 16 x bfloat>
ret <vscale x 16 x bfloat> %evec
}
define <vscale x 1 x bfloat> @vfptrunc_nxv1f64_nxv1bf16(<vscale x 1 x double> %va) {
;
; CHECK-LABEL: vfptrunc_nxv1f64_nxv1bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
; CHECK-NEXT: vfncvt.rod.f.f.w v9, v8
; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
; CHECK-NEXT: vfncvtbf16.f.f.w v8, v9
; CHECK-NEXT: ret
%evec = fptrunc <vscale x 1 x double> %va to <vscale x 1 x bfloat>
ret <vscale x 1 x bfloat> %evec
}