derek.holloway
7502bf64a4
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56 lines
1.8 KiB
LLVM
56 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt -S -passes=indvars < %s | FileCheck %s
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@x = global i32 0
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; %loop2 is never entered and we cannot derive any fact about %iv from it.
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define i32 @main(i32 %iv.start, i32 %arg2) mustprogress {
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; CHECK-LABEL: define i32 @main
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; CHECK-SAME: (i32 [[IV_START:%.*]], i32 [[ARG2:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ [[IV_START]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: br i1 false, label [[LOOP2_PREHEADER:%.*]], label [[LOOP_LATCH]]
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; CHECK: loop2.preheader:
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; CHECK-NEXT: br label [[LOOP2:%.*]]
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; CHECK: loop2:
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; CHECK-NEXT: br i1 true, label [[LOOP2_EXIT:%.*]], label [[LOOP2]]
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; CHECK: loop2.exit:
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; CHECK-NEXT: br label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[IV_NEXT]] = sdiv i32 [[ARG2]], [[IV]]
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; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[IV]], -1
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; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP_EXIT:%.*]], label [[LOOP]]
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; CHECK: loop.exit:
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; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi i32 [ [[IV_NEXT]], [[LOOP_LATCH]] ]
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; CHECK-NEXT: ret i32 [[IV_NEXT_LCSSA]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ %iv.next, %loop.latch ], [ %iv.start, %entry ]
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br i1 false, label %loop2.preheader, label %loop.latch
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loop2.preheader:
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br label %loop2
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loop2:
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%x = load i32, ptr @x, align 4
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%cmp1 = icmp ult i32 %iv, %x
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br i1 %cmp1, label %loop2.exit, label %loop2
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loop2.exit:
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br label %loop.latch
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loop.latch:
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%iv.next = sdiv i32 %arg2, %iv
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%cmp2 = icmp eq i32 %iv, -1
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br i1 %cmp2, label %loop.exit, label %loop
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loop.exit:
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%iv.next.lcssa = phi i32 [ %iv.next, %loop.latch ]
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ret i32 %iv.next.lcssa
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}
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