derek.holloway
7502bf64a4
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91 lines
4.8 KiB
LLVM
91 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; NOTE: Support the reduction in the inner loop.
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; RUN: opt < %s -passes="loop-interchange" -loop-interchange-reduction-to-mem -loop-interchange-profitabilities=ignore -S | FileCheck %s
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; for (int i = 0; i < 100; i++) {
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; r = 0;
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; for (int j = 0; j < 100; j++)
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; r = r + a[j][i] * b[j][i];
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; s[i] = r;
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; }
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define void @func(ptr noalias readonly %a, ptr noalias readonly %b, ptr noalias writeonly %s) {
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; CHECK-LABEL: define void @func(
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; CHECK-SAME: ptr noalias readonly [[A:%.*]], ptr noalias readonly [[B:%.*]], ptr noalias writeonly [[S:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: br label %[[INNERLOOP_PREHEADER:.*]]
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; CHECK: [[OUTERLOOPHEADER_PREHEADER:.*]]:
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; CHECK-NEXT: br label %[[OUTERLOOP_HEADER:.*]]
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; CHECK: [[OUTERLOOP_HEADER]]:
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; CHECK-NEXT: [[INDEX_I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[OUTERLOOP_LATCH:.*]] ], [ 0, %[[OUTERLOOPHEADER_PREHEADER]] ]
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; CHECK-NEXT: [[ADDR_S:%.*]] = getelementptr inbounds nuw double, ptr [[S]], i64 [[INDEX_I]]
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; CHECK-NEXT: [[ADDR_A:%.*]] = getelementptr inbounds nuw double, ptr [[A]], i64 [[INDEX_I]]
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; CHECK-NEXT: [[ADDR_B:%.*]] = getelementptr inbounds nuw double, ptr [[B]], i64 [[INDEX_I]]
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; CHECK-NEXT: br label %[[INNERLOOP_SPLIT1:.*]]
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; CHECK: [[INNERLOOP_PREHEADER]]:
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; CHECK-NEXT: br label %[[INNERLOOP:.*]]
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; CHECK: [[INNERLOOP]]:
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; CHECK-NEXT: [[INDEX_J:%.*]] = phi i64 [ [[J_NEXT:%.*]], %[[INNERLOOP_SPLIT:.*]] ], [ 0, %[[INNERLOOP_PREHEADER]] ]
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; CHECK-NEXT: [[REDUCTION:%.*]] = phi double [ [[ADD_LCSSA:%.*]], %[[INNERLOOP_SPLIT]] ], [ 0.000000e+00, %[[INNERLOOP_PREHEADER]] ]
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; CHECK-NEXT: [[FIRSTITER:%.*]] = phi i1 [ false, %[[INNERLOOP_SPLIT]] ], [ true, %[[INNERLOOP_PREHEADER]] ]
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; CHECK-NEXT: br label %[[OUTERLOOPHEADER_PREHEADER]]
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; CHECK: [[INNERLOOP_SPLIT1]]:
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; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ADDR_S]], align 8
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; CHECK-NEXT: [[NEW_VAR:%.*]] = select i1 [[FIRSTITER]], double 0.000000e+00, double [[TMP0]]
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; CHECK-NEXT: [[ADDR_A_J_I:%.*]] = getelementptr inbounds nuw [100 x double], ptr [[ADDR_A]], i64 [[INDEX_J]]
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; CHECK-NEXT: [[A_J_I:%.*]] = load double, ptr [[ADDR_A_J_I]], align 8
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; CHECK-NEXT: [[ADDR_B_J_I:%.*]] = getelementptr inbounds nuw [100 x double], ptr [[ADDR_B]], i64 [[INDEX_J]]
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; CHECK-NEXT: [[B_J_I:%.*]] = load double, ptr [[ADDR_B_J_I]], align 8
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; CHECK-NEXT: [[MUL:%.*]] = fmul fast double [[B_J_I]], [[A_J_I]]
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; CHECK-NEXT: [[ADD:%.*]] = fadd reassoc nnan nsz arcp contract afn double [[MUL]], [[NEW_VAR]]
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; CHECK-NEXT: store double [[ADD]], ptr [[ADDR_S]], align 8
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; CHECK-NEXT: [[DEAD_J_NEXT:%.*]] = add nuw nsw i64 [[INDEX_J]], 1
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; CHECK-NEXT: [[COND1:%.*]] = icmp eq i64 [[DEAD_J_NEXT]], 100
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; CHECK-NEXT: br label %[[OUTERLOOP_LATCH]]
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; CHECK: [[INNERLOOP_SPLIT]]:
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; CHECK-NEXT: [[ADD_LCSSA]] = phi double [ [[ADD]], %[[OUTERLOOP_LATCH]] ]
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; CHECK-NEXT: [[LCSSA:%.*]] = phi double [ [[ADD]], %[[OUTERLOOP_LATCH]] ]
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; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i64 [[INDEX_J]], 1
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; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i64 [[J_NEXT]], 100
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; CHECK-NEXT: br i1 [[CMP1]], label %[[EXIT_LOOPEXIT:.*]], label %[[INNERLOOP]]
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; CHECK: [[OUTERLOOP_LATCH]]:
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; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[INDEX_I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i64 [[I_NEXT]], 100
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; CHECK-NEXT: br i1 [[CMP2]], label %[[INNERLOOP_SPLIT]], label %[[OUTERLOOP_HEADER]]
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; CHECK: [[EXIT_LOOPEXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %outerloop_header
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outerloop_header:
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%index_i = phi i64 [ 0, %entry ], [ %index_i.next, %outerloop_latch ]
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%addr_s = getelementptr inbounds nuw double, ptr %s, i64 %index_i
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%invariant.gep.us = getelementptr inbounds nuw double, ptr %a, i64 %index_i
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%invariant.gep32.us = getelementptr inbounds nuw double, ptr %b, i64 %index_i
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br label %innerloop
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innerloop:
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%index_j = phi i64 [ 0, %outerloop_header ], [ %index_j.next, %innerloop ]
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%reduction = phi double [ 0.000000e+00, %outerloop_header ], [ %add, %innerloop ]
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%addr_a_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep.us, i64 %index_j
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%0 = load double, ptr %addr_a_j_i, align 8
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%addr_b_j_i = getelementptr inbounds nuw [100 x double], ptr %invariant.gep32.us, i64 %index_j
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%1 = load double, ptr %addr_b_j_i, align 8
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%mul = fmul fast double %1, %0
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%add = fadd fast double %mul, %reduction
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%index_j.next = add nuw nsw i64 %index_j, 1
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%cond1 = icmp eq i64 %index_j.next, 100
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br i1 %cond1, label %outerloop_latch, label %innerloop
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outerloop_latch:
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%lcssa = phi double [ %add, %innerloop ]
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store double %lcssa, ptr %addr_s, align 8
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%index_i.next = add nuw nsw i64 %index_i, 1
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%cond2 = icmp eq i64 %index_i.next, 100
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br i1 %cond2, label %exit, label %outerloop_header
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exit:
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ret void
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}
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