derek.holloway
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119 lines
3.0 KiB
LLVM
119 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; REQUIRES: asserts
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; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(loop-simplifycfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
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; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes=loop-simplifycfg -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
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target triple = "x86_64-unknown-linux-gnu"
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define void @test() {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb1.loopexit:
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; CHECK-NEXT: br label [[BB1]]
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; CHECK: bb1:
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; CHECK-NEXT: br label [[BB2:%.*]]
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; CHECK: bb2.loopexit:
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; CHECK-NEXT: br label [[BB2]]
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; CHECK: bb2:
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; CHECK-NEXT: switch i32 0, label [[BB2_SPLIT:%.*]] [
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; CHECK-NEXT: i32 1, label [[BB1_LOOPEXIT:%.*]]
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; CHECK-NEXT: i32 2, label [[BB2_LOOPEXIT:%.*]]
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; CHECK-NEXT: ]
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; CHECK: bb2.split:
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: br label [[BB3]]
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;
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br label %bb1
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bb1: ; preds = %bb4, %0
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br label %bb2
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bb2: ; preds = %bb6, %bb1
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br label %bb3
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bb3: ; preds = %bb8, %bb3, %bb2
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br i1 false, label %bb4, label %bb3
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bb4: ; preds = %bb8, %bb3
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br i1 true, label %bb1, label %bb6
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bb6: ; preds = %bb4
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br i1 false, label %bb2, label %bb8
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bb8: ; preds = %bb6
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br i1 true, label %bb4, label %bb3
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}
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define void @test_many_subloops(i1 %c) {
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; CHECK-LABEL: @test_many_subloops(
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb1.loopexit:
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; CHECK-NEXT: br label [[BB1]]
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; CHECK: bb1:
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; CHECK-NEXT: br label [[BB2:%.*]]
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; CHECK: bb2.loopexit:
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; CHECK-NEXT: br label [[BB2]]
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; CHECK: bb2:
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; CHECK-NEXT: switch i32 0, label [[BB2_SPLIT:%.*]] [
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; CHECK-NEXT: i32 1, label [[BB1_LOOPEXIT:%.*]]
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; CHECK-NEXT: i32 2, label [[BB2_LOOPEXIT:%.*]]
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; CHECK-NEXT: ]
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; CHECK: bb2.split:
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: br label [[BB3]]
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;
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br label %bb1
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bb1:
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br label %bb2
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bb2:
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br label %bb3
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bb3:
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br i1 false, label %bb4, label %bb3
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bb4:
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br i1 %c, label %bb1, label %subloop1
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subloop1:
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br i1 %c, label %subloop2, label %subloop11
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subloop11:
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br i1 %c, label %subloop11, label %subloop12
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subloop12:
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br i1 %c, label %subloop12, label %subloop13
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subloop13:
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br i1 %c, label %subloop13, label %subloop1_latch
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subloop1_latch:
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br label %subloop1
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subloop2:
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br i1 %c, label %bb6, label %subloop21
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subloop21:
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br i1 %c, label %subloop21, label %subloop22
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subloop22:
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br i1 %c, label %subloop22, label %subloop23
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subloop23:
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br i1 %c, label %subloop23, label %subloop2_latch
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subloop2_latch:
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br label %subloop2
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bb6:
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br i1 %c, label %bb2, label %bb8
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bb8:
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br i1 true, label %bb4, label %bb3
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}
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