derek.holloway
7502bf64a4
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66 lines
958 B
ArmAsm
66 lines
958 B
ArmAsm
# sh testcase for pclr
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# mach: shdsp
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# as(shdsp): -defsym sim_cpu=1 -dsp
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# FIXME: opcode table ambiguity in ignored bits 4-7.
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.include "testutils.inc"
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start
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pclr_cc:
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set_grs_a5a5
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lds r0, a0
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pcopy a0, a1
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lds r0, x0
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lds r0, x1
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lds r0, y0
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lds r0, y1
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pcopy x0, m0
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pcopy y1, m1
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assert_sreg 0xa5a5a5a5, x0
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pclr x0
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assert_sreg 0, x0
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set_dcfalse
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dct pclr x1
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assert_sreg 0xa5a5a5a5, x1
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set_dctrue
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dct pclr x1
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assert_sreg 0, x1
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set_dctrue
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dcf pclr y0
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assert_sreg 0xa5a5a5a5, y0
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set_dcfalse
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dcf pclr y0
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assert_sreg 0, y0
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test_grs_a5a5
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assert_sreg 0xa5a5a5a5, a0
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assert_sreg 0xa5a5a5a5, y1
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assert_sreg2 0xa5a5a5a5, a1
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assert_sreg2 0xa5a5a5a5, m0
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assert_sreg2 0xa5a5a5a5, m1
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pclr_pmuls:
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set_grs_a5a5
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lds r0, a0
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pcopy a0, a1
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lds r0, x0
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lds r0, x1
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lds r0, y0
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lds r0, y1
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pcopy x0, m0
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pcopy y1, m1
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pclr x0 pmuls y0, y1, a0
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assert_sreg 0, x0
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assert_sreg 0x3fc838b2, a0 ! 0xa5a5 x 0xa5a5
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test_grs_a5a5
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pass
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exit 0
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