derek.holloway
7502bf64a4
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50 lines
3.2 KiB
Plaintext
50 lines
3.2 KiB
Plaintext
// Start counters PM4 packets sequence
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// GRBM_GFX_INDEX broadcast
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'SET_UCONFIG_REG' size(3) : c0017900 00000200 e0000000
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// Disable RLC Perfmon Clock Gating, RLC_PERFMON_CLK_CNTL = 1
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'SET_UCONFIG_REG' size(3) : c0017900 00001cbf 00000001
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// CP_PERFMON_CNTL reset
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'SET_UCONFIG_REG' size(3) : c0017900 00001808 00000000
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// GRBM_GFX_INDEX to block instance (0)
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'SET_UCONFIG_REG' size(3) : c0017900 00000200 a0000000
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// Reset counter, PERFCOUNTER_RSLT_CNTL.CLEAR_ALL = 1
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'COPY_DATA dst_sel=4' size(6) : c0044000 00000405 02000000 00000000 00002afb 00000000
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// Setup counter, PERFCOUNTER*_CFG{PERF_SEL = event, PERF_MODE = ACCUM, ENABLE = 1}
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'COPY_DATA dst_sel=4' size(6) : c0044000 00000405 10000000 00000000 00002af9 00000000
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// Config counter, PERFCOUNTER_RSLT_CNTL = slot
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'COPY_DATA dst_sel=4' size(6) : c0044000 00000405 00000000 00000000 00002afb 00000000
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// Start counter, PERFCOUNTER_RSLT_CNTL.ENABLE_ANY = 1
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'COPY_DATA dst_sel=4' size(6) : c0044000 00000405 01000000 00000000 00002afb 00000000
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// GRBM_GFX_INDEX broadcast
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'SET_UCONFIG_REG' size(3) : c0017900 00000200 e0000000
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// Set COMPUTE_PERFCOUNT_ENABLE
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'SET_SH_REG' size(3) : c0017600 0000020b 00000001
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// CP_PERFMON_CNTL reset
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'SET_UCONFIG_REG' size(3) : c0017900 00001808 00000000
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// CP_PERFMON_CNTL start
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'SET_UCONFIG_REG' size(3) : c0017900 00001808 00000001
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// Issue barrier command to apply the commands to configure perfcounters
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'BarrierCommand' size(2) : c0004600 00000407
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'CacheFlushPacket' size(7) : c0055800 28c40000 ffffffff 00ffffff 00000000 00000000 00000004
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// Stop/Sample counters PM4 packets sequence
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// Issue barrier command to wait for dispatch to complete
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'BarrierCommand' size(2) : c0004600 00000407
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'CacheFlushPacket' size(7) : c0055800 28c40000 ffffffff 00ffffff 00000000 00000000 00000004
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// CP_PERFMON_CNTL stop/sample
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'SET_UCONFIG_REG' size(3) : c0017900 00001808 00000402
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// GRBM_GFX_INDEX broadcast
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'SET_UCONFIG_REG' size(3) : c0017900 00000200 e0000000
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// GRBM_GFX_INDEX to block instance (0)
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'SET_UCONFIG_REG' size(3) : c0017900 00000200 a0000000
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// Config counter, PERFCOUNTER_RSLT_CNTL = slot
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'COPY_DATA dst_sel=4' size(6) : c0044000 00000405 00000000 00000000 00002afb 00000000
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// Read Perfcounter LO word
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'COPY_DATA src_sel=4' size(6) : c0044000 02002504 00002af7 00000000 04d32000 00000000
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// Read Perfcounter HI word
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'COPY_DATA src_sel=4' size(6) : c0044000 02002504 00002af8 00000000 04d32004 00000000
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// GRBM_GFX_INDEX broadcast
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'SET_UCONFIG_REG' size(3) : c0017900 00000200 e0000000
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// Enable RLC Perfmon Clock Gating, RLC_PERFMON_CLK_CNTL = 0
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'SET_UCONFIG_REG' size(3) : c0017900 00001cbf 00000000
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