derek.holloway
7502bf64a4
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328 lines
32 KiB
Plaintext
328 lines
32 KiB
Plaintext
/*
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Copyright (c) 2020 - present Advanced Micro Devices, Inc. All rights reserved.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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// clang-format off
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// Description Fields:
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// Arg # Type Meaning
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// -------------------------------------------------
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// 1 rdc_field_t enum of field
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// 2 string description of enum
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// 3 string rdci display label
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// 4 bool do or do not display in rdci
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// rdc_field_t Description rdci label To Display
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// =========== =========== ========= ==========
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#ifndef FLD_DESC_ENT
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#define FLD_DESC_ENT(ID, DESC, LABEL, DISPLAY)
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#endif
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FLD_DESC_ENT(RDC_FI_INVALID, "Unknown/Invalid field", "INVALID", false)
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FLD_DESC_ENT(RDC_FI_GPU_COUNT, "GPU count in the system", "GPU_COUNT", true)
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FLD_DESC_ENT(RDC_FI_DEV_NAME, "Name of the device", "DEV_NAME", true)
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FLD_DESC_ENT(RDC_FI_OAM_ID, "OAM ID of the device", "OAM_ID", true)
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FLD_DESC_ENT(RDC_FI_DEV_ID, "ID of the device", "DEV_ID", true)
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FLD_DESC_ENT(RDC_FI_REV_ID, "Revision ID of the device", "REV_ID", true)
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FLD_DESC_ENT(RDC_FI_TARGET_GRAPHICS_VERSION, "GFX version of the device", "GFX", true)
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FLD_DESC_ENT(RDC_FI_NUM_OF_COMPUTE_UNITS, "Number of Compute Units", "COMPUTE_UNITS", true)
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FLD_DESC_ENT(RDC_FI_UUID, "Unique ID of the device AKA asic_serial", "UUID", true)
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FLD_DESC_ENT(RDC_FI_GPU_PARTITION_COUNT, "GPU partition count", "PARTITION_COUNT", true)
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FLD_DESC_ENT(RDC_FI_KFD_ID, "KFD_ID of GPU", "KFD_ID", true)
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FLD_DESC_ENT(RDC_FI_GPU_CLOCK, "Current GPU clock frequencies", "GPU_CLOCK", true)
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FLD_DESC_ENT(RDC_FI_MEM_CLOCK, "Current Memory clock frequencies", "MEM_CLOCK", true)
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FLD_DESC_ENT(RDC_FI_GPU_CLOCK_MIN, "Minimum GPU clock frequency", "GPU_CLOCK_MIN", true)
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FLD_DESC_ENT(RDC_FI_GPU_CLOCK_MAX, "Maximum GPU clock frequency", "GPU_CLOCK_MAX", true)
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FLD_DESC_ENT(RDC_FI_SOC_CLOCK, "Current SOC clock frequency", "SOC_CLOCK", true)
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FLD_DESC_ENT(RDC_FI_VCLK0, "Current Video clock 0 frequency", "VCLK0", true)
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FLD_DESC_ENT(RDC_FI_DCLK0, "Current Display clock 0 frequency", "DCLK0", true)
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FLD_DESC_ENT(RDC_FI_MEMORY_TEMP, "Memory temperature in millidegrees Celsius", "MEMORY_TEMP", true)
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FLD_DESC_ENT(RDC_FI_GPU_TEMP, "GPU temperature in millidegrees Celsius", "GPU_TEMP", true)
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FLD_DESC_ENT(RDC_FI_GPU_JUNCTION_TEMP, "Junction/hotspot temperature in millideg C", "JUNCTION_TEMP", true)
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FLD_DESC_ENT(RDC_FI_POWER_USAGE, "Power usage in microwatts", "POWER_USAGE", true)
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FLD_DESC_ENT(RDC_FI_GPU_ENERGY, "GPU energy accumulator in microjoules", "GPU_ENERGY", true)
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FLD_DESC_ENT(RDC_FI_PCIE_TX, "PCIe Tx utilization in bytes/second", "PCIE_TX", true)
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FLD_DESC_ENT(RDC_FI_PCIE_RX, "PCIe Rx utilization in bytes/second", "PCIE_RX", true)
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FLD_DESC_ENT(RDC_FI_PCIE_BANDWIDTH, "PCIe bandwidth in GB/sec", "PCIE_BANDWIDTH", true)
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FLD_DESC_ENT(RDC_FI_PCIE_LC_PERF_OTHER_END_RECOVERY, "PCIe end recovery counter", "PCIE_RECOVERY_COUNT", true)
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FLD_DESC_ENT(RDC_FI_PCIE_NAK_RCVD_COUNT_ACC, "PCIe nak received counter", "PCIE_NAK_RCVD_COUNT", true)
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FLD_DESC_ENT(RDC_FI_PCIE_NAK_SENT_COUNT_ACC, "PCIe nak sent counter", "PCIE_NAK_SENT_COUNT", true)
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FLD_DESC_ENT(RDC_FI_PCIE_SPEED, "Current PCIe speed in MT/s", "PCIE_SPEED", true)
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FLD_DESC_ENT(RDC_FI_PCIE_MAX_SPEED, "Maximum PCIe speed in MT/s", "PCIE_MAX_SPEED", true)
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FLD_DESC_ENT(RDC_FI_PCIE_REPLAY_ROLLOVER,"PCIe replay rollover count", "PCIE_REPLAY_ROLL", true)
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FLD_DESC_ENT(RDC_FI_PCIE_BANDWIDTH_BIDIR,"PCIe bidirectional bandwidth", "PCIE_BW_BIDIR", true)
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FLD_DESC_ENT(RDC_FI_GPU_UTIL, "GPU busy percentage", "GPU_UTIL", true)
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FLD_DESC_ENT(RDC_FI_GPU_MEMORY_USAGE, "Memory usage of the GPU instance in bytes", "GPU_MEMORY_USAGE", true)
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FLD_DESC_ENT(RDC_FI_GPU_MEMORY_TOTAL, "Total memory of the GPU instance", "GPU_MEMORY_TOTAL", true)
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FLD_DESC_ENT(RDC_FI_GPU_MM_ENC_UTIL, "Mutilmedia encoder busy percentage", "GPU_MM_ENC_UTIL", true)
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FLD_DESC_ENT(RDC_FI_GPU_MM_DEC_UTIL, "Mutilmedia decoder busy percentage", "GPU_MM_DEC_UTIL", true)
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FLD_DESC_ENT(RDC_FI_GPU_MEMORY_ACTIVITY, "Memory busy percentage", "GPU_MEM_UTIL", true)
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FLD_DESC_ENT(RDC_FI_GPU_MEMORY_MAX_BANDWIDTH, "Memory max bandwidth", "GPU_MEM_MAX_BANDWIDTH", true)
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FLD_DESC_ENT(RDC_FI_GPU_MEMORY_CUR_BANDWIDTH, "Memory current bandwidth", "GPU_MEM_CUR_BANDWIDTH", true)
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FLD_DESC_ENT(RDC_FI_GPU_BUSY_PERCENT, "GPU busy percentage", "GPU_BUSY_PERCENT", true)
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FLD_DESC_ENT(RDC_FI_GFX_ACTIVITY_ACC, "GFX activity accumulated counter", "GFX_ACTIVITY_ACC", true)
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FLD_DESC_ENT(RDC_FI_MEM_ACTIVITY_ACC, "Memory activity accumulated counter", "MEM_ACTIVITY_ACC", true)
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FLD_DESC_ENT(RDC_FI_ACCUMULATION_COUNTER, "Accumulation cycle counter", "ACCUMULATION_COUNTER", true)
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FLD_DESC_ENT(RDC_FI_GPU_MEMORY_FREE, "Free VRAM memory in bytes", "GPU_MEM_FREE", true)
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FLD_DESC_ENT(RDC_FI_GPU_VIS_VRAM_TOTAL, "Total visible VRAM memory in bytes", "VIS_VRAM_TOTAL", true)
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FLD_DESC_ENT(RDC_FI_GPU_VIS_VRAM_USED, "Used visible VRAM memory in bytes", "VIS_VRAM_USED", true)
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FLD_DESC_ENT(RDC_FI_GPU_VIS_VRAM_FREE, "Free visible VRAM memory in bytes", "VIS_VRAM_FREE", true)
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FLD_DESC_ENT(RDC_FI_GPU_GTT_TOTAL, "Total GTT memory in bytes", "GTT_TOTAL", true)
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FLD_DESC_ENT(RDC_FI_GPU_GTT_USED, "Used GTT memory in bytes", "GTT_USED", true)
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FLD_DESC_ENT(RDC_FI_GPU_GTT_FREE, "Free GTT memory in bytes", "GTT_FREE", true)
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FLD_DESC_ENT(RDC_FI_GPU_GFX_BUSY_INST, "Instantaneous GFX busy percentage", "GFX_BUSY_INST", true)
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FLD_DESC_ENT(RDC_FI_GPU_VCN_BUSY_INST, "Instantaneous VCN busy percentage", "VCN_BUSY_INST", true)
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FLD_DESC_ENT(RDC_FI_GPU_JPEG_BUSY_INST, "Instantaneous JPEG busy percentage", "JPEG_BUSY_INST", true)
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FLD_DESC_ENT(RDC_FI_GPU_PAGE_RETRIED, "Retried page of the GPU instance", "GPU_PAGE_RETRIED", true)
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// ECC totals
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FLD_DESC_ENT(RDC_FI_ECC_CORRECT_TOTAL, "Accumulated Single Error Correction", "ECC_CORRECT", true)
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FLD_DESC_ENT(RDC_FI_ECC_UNCORRECT_TOTAL, "Accumulated Double Error Detection", "ECC_UNCORRECT", true)
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// ECC blocks
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FLD_DESC_ENT(RDC_FI_ECC_SDMA_CE, "SDMA Correctable Error", "ECC_SDMA_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_SDMA_UE, "SDMA Uncorrectable Error", "ECC_SDMA_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_GFX_CE, "GFX Correctable Error", "ECC_GFX_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_GFX_UE, "GFX Uncorrectable Error", "ECC_GFX_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MMHUB_CE, "MMHUB Correctable Error", "ECC_MMHUB_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MMHUB_UE, "MMHUB Uncorrectable Error", "ECC_MMHUB_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_ATHUB_CE, "ATHUB Correctable Error", "ECC_ATHUB_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_ATHUB_UE, "ATHUB Uncorrectable Error", "ECC_ATHUB_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_PCIE_BIF_CE, "PCIE_BIF Correctable Error", "ECC_PCIE_BIF_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_PCIE_BIF_UE, "PCIE_BIF Uncorrectable Error", "ECC_PCIE_BIF_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_HDP_CE, "HDP Correctable Error", "ECC_HDP_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_HDP_UE, "HDP Uncorrectable Error", "ECC_HDP_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_XGMI_WAFL_CE, "XGMI_WAFL Correctable Error", "ECC_XGMI_WAFL_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_XGMI_WAFL_UE, "XGMI_WAFL Uncorrectable Error", "ECC_XGMI_WAFL_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_DF_CE, "DF Correctable Error", "ECC_DF_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_DF_UE, "DF Uncorrectable Error", "ECC_DF_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_SMN_CE, "SMN Correctable Error", "ECC_SMN_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_SMN_UE, "SMN Uncorrectable Error", "ECC_SMN_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_SEM_CE, "SEM Correctable Error", "ECC_SEM_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_SEM_UE, "SEM Uncorrectable Error", "ECC_SEM_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MP0_CE, "MP0 Correctable Error", "ECC_MP0_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MP0_UE, "MP0 Uncorrectable Error", "ECC_MP0_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MP1_CE, "MP1 Correctable Error", "ECC_MP1_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MP1_UE, "MP1 Uncorrectable Error", "ECC_MP1_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_FUSE_CE, "FUSE Correctable Error", "ECC_FUSE_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_FUSE_UE, "FUSE Uncorrectable Error", "ECC_FUSE_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_UMC_CE, "UMC Correctable Error", "ECC_UMC_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_UMC_UE, "UMC Uncorrectable Error", "ECC_UMC_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MCA_CE, "MCA Correctable Error", "ECC_MCA_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MCA_UE, "MCA Uncorrectable Error", "ECC_MCA_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_VCN_CE, "VCN Correctable Error", "ECC_VCN_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_VCN_UE, "VCN Uncorrectable Error", "ECC_VCN_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_JPEG_CE, "JPEG Correctable Error", "ECC_JPEG_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_JPEG_UE, "JPEG Uncorrectable Error", "ECC_JPEG_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_IH_CE, "IH Correctable Error", "ECC_IH_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_IH_UE, "IH Uncorrectable Error", "ECC_IH_UE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MPIO_CE, "MPIO Correctable Error", "ECC_MPIO_CE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MPIO_UE, "MPIO Uncorrectable Error", "ECC_MPIO_UE", true)
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// ECC deferred
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FLD_DESC_ENT(RDC_FI_ECC_SDMA_DE, "SDMA Deferred Error", "ECC_SDMA_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_GFX_DE, "GFX Deferred Error", "ECC_GFX_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MMHUB_DE, "MMHUB Deferred Error", "ECC_MMHUB_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_ATHUB_DE, "ATHUB Deferred Error", "ECC_ATHUB_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_PCIE_BIF_DE, "PCIE_BIF Deferred Error", "ECC_PCIE_BIF_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_HDP_DE, "HDP Deferred Error", "ECC_HDP_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_XGMI_WAFL_DE, "XGMI_WAFL Deferred Error", "ECC_XGMI_WAFL_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_DF_DE, "DF Deferred Error", "ECC_DF_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_SMN_DE, "SMN Deferred Error", "ECC_SMN_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_SEM_DE, "SEM Deferred Error", "ECC_SEM_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MP0_DE, "MP0 Deferred Error", "ECC_MP0_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MP1_DE, "MP1 Deferred Error", "ECC_MP1_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_FUSE_DE, "FUSE Deferred Error", "ECC_FUSE_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_UMC_DE, "UMC Deferred Error", "ECC_UMC_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MCA_DE, "MCA Deferred Error", "ECC_MCA_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_VCN_DE, "VCN Deferred Error", "ECC_VCN_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_JPEG_DE, "JPEG Deferred Error", "ECC_JPEG_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_IH_DE, "IH Deferred Error", "ECC_IH_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_MPIO_DE, "MPIO Deferred Error", "ECC_MPIO_DE", true)
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FLD_DESC_ENT(RDC_FI_ECC_DEFERRED_TOTAL, "Total Accumulated Deferred ECC Errors", "ECC_DEFER_TOTAL", true)
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// XGMI
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FLD_DESC_ENT(RDC_FI_XGMI_0_READ_KB, "XGMI0 accumulated data read size (KB)", "XGMI_0_READ", true)
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FLD_DESC_ENT(RDC_FI_XGMI_1_READ_KB, "XGMI1 accumulated data read size (KB)", "XGMI_1_READ", true)
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FLD_DESC_ENT(RDC_FI_XGMI_2_READ_KB, "XGMI2 accumulated data read size (KB)", "XGMI_2_READ", true)
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FLD_DESC_ENT(RDC_FI_XGMI_3_READ_KB, "XGMI3 accumulated data read size (KB)", "XGMI_3_READ", true)
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FLD_DESC_ENT(RDC_FI_XGMI_4_READ_KB, "XGMI4 accumulated data read size (KB)", "XGMI_4_READ", true)
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FLD_DESC_ENT(RDC_FI_XGMI_5_READ_KB, "XGMI5 accumulated data read size (KB)", "XGMI_5_READ", true)
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FLD_DESC_ENT(RDC_FI_XGMI_6_READ_KB, "XGMI6 accumulated data read size (KB)", "XGMI_6_READ", true)
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FLD_DESC_ENT(RDC_FI_XGMI_7_READ_KB, "XGMI7 accumulated data read size (KB)", "XGMI_7_READ", true)
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FLD_DESC_ENT(RDC_FI_XGMI_0_WRITE_KB, "XGMI0 accumulated data write size (KB)", "XGMI_0_WRITE", true)
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FLD_DESC_ENT(RDC_FI_XGMI_1_WRITE_KB, "XGMI1 accumulated data write size (KB)", "XGMI_1_WRITE", true)
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FLD_DESC_ENT(RDC_FI_XGMI_2_WRITE_KB, "XGMI2 accumulated data write size (KB)", "XGMI_2_WRITE", true)
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FLD_DESC_ENT(RDC_FI_XGMI_3_WRITE_KB, "XGMI3 accumulated data write size (KB)", "XGMI_3_WRITE", true)
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FLD_DESC_ENT(RDC_FI_XGMI_4_WRITE_KB, "XGMI4 accumulated data write size (KB)", "XGMI_4_WRITE", true)
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FLD_DESC_ENT(RDC_FI_XGMI_5_WRITE_KB, "XGMI5 accumulated data write size (KB)", "XGMI_5_WRITE", true)
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FLD_DESC_ENT(RDC_FI_XGMI_6_WRITE_KB, "XGMI6 accumulated data write size (KB)", "XGMI_6_WRITE", true)
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FLD_DESC_ENT(RDC_FI_XGMI_7_WRITE_KB, "XGMI7 accumulated data write size (KB)", "XGMI_7_WRITE", true)
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FLD_DESC_ENT(RDC_FI_XGMI_TOTAL_READ_KB, "XGMI accumulated data read size across all lanes (KB)", "XGMI_TOTAL_READ", true)
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FLD_DESC_ENT(RDC_FI_XGMI_TOTAL_WRITE_KB, "XGMI accumulated data write size across all lanes (KB)", "XGMI_TOTAL_WRITE", true)
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// ROCProfiler fields
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// This doesn't map to rocprofiler counters directly
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// See counter_map in rdc/include/rdc_libs/rdc_modules/rdc_rocp/RdcRocpBase.h
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// See metrics.xml in rocprofiler
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FLD_DESC_ENT(RDC_FI_PROF_OCCUPANCY_PERCENT, "Percent of GPU occupancy", "OCCUPANCY_PERCENT", true)
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FLD_DESC_ENT(RDC_FI_PROF_ACTIVE_CYCLES, "Number of Active Cycles", "ACTIVE_CYCLES", true)
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FLD_DESC_ENT(RDC_FI_PROF_ACTIVE_WAVES, "Number of Active Waves", "ACTIVE_WAVES", true)
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FLD_DESC_ENT(RDC_FI_PROF_ELAPSED_CYCLES, "Number of Elapsed Cycles over all SMs", "ELAPSED_CYCLES", true)
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FLD_DESC_ENT(RDC_FI_PROF_TENSOR_ACTIVE_PERCENT, "Percent of Active Pipe Tensors", "TENSOR_PERCENT", true)
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FLD_DESC_ENT(RDC_FI_PROF_GPU_UTIL_PERCENT, "Percent of GPU Utilization", "GPU_UTIL_PERCENT", true)
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// metrics with EVAL are divided by time passed
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FLD_DESC_ENT(RDC_FI_PROF_EVAL_MEM_R_BW, "Fetched from video memory kb / ms", "MEM_R_BW", true)
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FLD_DESC_ENT(RDC_FI_PROF_EVAL_MEM_W_BW, "Written to video memory kb / ms", "MEM_W_BW", true)
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FLD_DESC_ENT(RDC_FI_PROF_EVAL_FLOPS_16, "Number of fp16 OPS / ms", "FLOPS_16", true)
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FLD_DESC_ENT(RDC_FI_PROF_EVAL_FLOPS_32, "Number of fp32 OPS / ms", "FLOPS_32", true)
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FLD_DESC_ENT(RDC_FI_PROF_EVAL_FLOPS_64, "Number of fp64 OPS / ms", "FLOPS_64", true)
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FLD_DESC_ENT(RDC_FI_PROF_VALU_PIPE_ISSUE_UTIL, "Percent of Active Pipe VALU", "VALU_UTILIZATION", true)
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FLD_DESC_ENT(RDC_FI_PROF_SM_ACTIVE, "Ratio of Cycles with active warp on SM","VALUBusy", true)
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FLD_DESC_ENT(RDC_FI_PROF_OCC_PER_ACTIVE_CU, "Mean occ per active compute unit", "OCC_CU", true)
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FLD_DESC_ENT(RDC_FI_PROF_OCC_ELAPSED, "Mean occ per active cu over elapsed", "OCC_CU_ELAPSED", true)
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FLD_DESC_ENT(RDC_FI_PROF_EVAL_FLOPS_16_PERCENT, "Number of fp16 OPS percent of max", "FLOPS_16_PERCENT", true)
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FLD_DESC_ENT(RDC_FI_PROF_EVAL_FLOPS_32_PERCENT, "Number of fp32 OPS percent of max", "FLOPS_32_PERCENT", true)
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FLD_DESC_ENT(RDC_FI_PROF_EVAL_FLOPS_64_PERCENT, "Number of fp64 OPS percent of max", "FLOPS_64_PERCENT", true)
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// CPC
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CPC_STAT_BUSY, "", "CPC_CPC_STAT_BUSY", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CPC_STAT_IDLE, "", "CPC_CPC_STAT_IDLE", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CPC_STAT_STALL, "", "CPC_CPC_STAT_STALL", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CPC_TCIU_BUSY, "", "CPC_CPC_TCIU_BUSY", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CPC_TCIU_IDLE, "", "CPC_CPC_TCIU_IDLE", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CPC_UTCL2IU_BUSY, "", "CPC_CPC_UTCL2IU_BUSY", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CPC_UTCL2IU_IDLE, "", "CPC_CPC_UTCL2IU_IDLE", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CPC_UTCL2IU_STALL, "", "CPC_CPC_UTCL2IU_STALL", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_ME1_BUSY_FOR_PACKET_DECODE, "", "CPC_ME1_BUSY_FOR_PACKET_DECODE", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_ME1_DC0_SPI_BUSY, "", "CPC_ME1_DC0_SPI_BUSY", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_UTCL1_STALL_ON_TRANSLATION, "", "CPC_UTCL1_STALL_ON_TRANSLATION", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_ALWAYS_COUNT, "", "CPC_ALWAYS_COUNT", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_ADC_VALID_CHUNK_NOT_AVAIL, "", "CPC_ADC_VALID_CHUNK_NOT_AVAIL", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_ADC_DISPATCH_ALLOC_DONE, "", "CPC_ADC_DISPATCH_ALLOC_DONE", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_ADC_VALID_CHUNK_END, "", "CPC_ADC_VALID_CHUNK_END", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_SYNC_FIFO_FULL_LEVEL, "", "CPC_SYNC_FIFO_FULL_LEVEL", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_SYNC_FIFO_FULL, "", "CPC_SYNC_FIFO_FULL", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_GD_BUSY, "", "CPC_GD_BUSY", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_TG_SEND, "", "CPC_TG_SEND", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_WALK_NEXT_CHUNK, "", "CPC_WALK_NEXT_CHUNK", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_STALLED_BY_SE0_SPI, "", "CPC_STALLED_BY_SE0_SPI", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_STALLED_BY_SE1_SPI, "", "CPC_STALLED_BY_SE1_SPI", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_STALLED_BY_SE2_SPI, "", "CPC_STALLED_BY_SE2_SPI", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_STALLED_BY_SE3_SPI, "", "CPC_STALLED_BY_SE3_SPI", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_LTE_ALL, "", "CPC_LTE_ALL", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_SYNC_WRREQ_FIFO_BUSY, "", "CPC_SYNC_WRREQ_FIFO_BUSY", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CANE_BUSY, "", "CPC_CANE_BUSY", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPC_CANE_STALL, "", "CPC_CANE_STALL", false)
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// CPF
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FLD_DESC_ENT(RDC_FI_PROF_CPF_CMP_UTCL1_STALL_ON_TRANSLATION, "", "CPF_CMP_UTCL1_STALL_ON_TRANSLATION", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPF_CPF_STAT_BUSY, "", "CPF_CPF_STAT_BUSY", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPF_CPF_STAT_IDLE, "", "CPF_CPF_STAT_IDLE", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPF_CPF_STAT_STALL, "", "CPF_CPF_STAT_STALL", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPF_CPF_TCIU_BUSY, "", "CPF_CPF_TCIU_BUSY", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPF_CPF_TCIU_IDLE, "", "CPF_CPF_TCIU_IDLE", false)
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FLD_DESC_ENT(RDC_FI_PROF_CPF_CPF_TCIU_STALL, "", "CPF_CPF_TCIU_STALL", false)
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// Misc
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FLD_DESC_ENT(RDC_FI_PROF_SIMD_UTILIZATION, "Fraction of time the SIMDs are being utilized", "SIMD_UTILIZATION", false)
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// Events
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FLD_DESC_ENT(RDC_EVNT_XGMI_0_NOP_TX, "NOPs sent to neighbor 0", "XGMI_NOP_0", false)
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FLD_DESC_ENT(RDC_EVNT_XGMI_0_REQ_TX, "Outgoing requests to neighbor 0", "XGMI_REQ_0", false)
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FLD_DESC_ENT(RDC_EVNT_XGMI_0_RESP_TX, "Outgoing responses to neighbor 0", "XGMI_RES_0", false)
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FLD_DESC_ENT(RDC_EVNT_XGMI_0_BEATS_TX, "Data sent to neighbor 0 (32 byte pkts)", "XGMI_BTS_0", false)
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FLD_DESC_ENT(RDC_EVNT_XGMI_1_NOP_TX, "NOPs sent to neighbor 1", "XGMI_NOP_1", false)
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FLD_DESC_ENT(RDC_EVNT_XGMI_1_REQ_TX, "Outgoing requests to neighbor 1", "XGMI_REQ_1", false)
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FLD_DESC_ENT(RDC_EVNT_XGMI_1_RESP_TX, "Outgoing responses to neighbor 1", "XGMI_RES_1", false)
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FLD_DESC_ENT(RDC_EVNT_XGMI_1_BEATS_TX, "Data sent to neighbor 1 (32 byte pkts)", "XGMI_BTS_1", false)
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FLD_DESC_ENT(RDC_EVNT_XGMI_0_THRPUT, "Tx throughput to XGMI neighbor 0 in b/s", "XGMI_0_T", true)
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FLD_DESC_ENT(RDC_EVNT_XGMI_1_THRPUT, "Tx throughput to XGMI neighbor 1 in b/s", "XGMI_1_T", true)
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FLD_DESC_ENT(RDC_EVNT_XGMI_2_THRPUT, "Tx throughput to XGMI neighbor 2 in b/s", "XGMI_2_T", true)
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FLD_DESC_ENT(RDC_EVNT_XGMI_3_THRPUT, "Tx throughput to XGMI neighbor 3 in b/s", "XGMI_3_T", true)
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FLD_DESC_ENT(RDC_EVNT_XGMI_4_THRPUT, "Tx throughput to XGMI neighbor 4 in b/s", "XGMI_4_T", true)
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FLD_DESC_ENT(RDC_EVNT_XGMI_5_THRPUT, "Tx throughput to XGMI neighbor 5 in b/s", "XGMI_5_T", true)
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// Asynchronous event notifications
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FLD_DESC_ENT(RDC_EVNT_NOTIF_VMFAULT, "VM page fault", "VM_PAGE_FAULT", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_THERMAL_THROTTLE, "Clk freq decrease due to temp", "THERMAL_THROT", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_PRE_RESET, "GPU reset is about to occur", "GPU_PRE_RESET", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_POST_RESET, "GPU reset just occurred", "GPU_POST_RESET", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_MIGRATE_START, "GPU migrate has started", "MIGRATE_START", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_MIGRATE_END, "GPU migrate has ended", "MIGRATE_END", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_PAGE_FAULT_START, "GPU page fault started", "PAGE_FAULT_START", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_PAGE_FAULT_END, "GPU page fault ended", "PAGE_FAULT_END", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_QUEUE_EVICTION, "GPU queue eviction occurred", "QUEUE_EVICTION", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_QUEUE_RESTORE, "GPU queue restore occurred", "QUEUE_RESTORE", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_UNMAP_FROM_GPU, "GPU unmap occurred", "UNMAP_FROM_GPU", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_PROCESS_START, "GPU process started", "PROCESS_START", false)
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FLD_DESC_ENT(RDC_EVNT_NOTIF_PROCESS_END, "GPU process ended", "PROCESS_END", false)
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// RDC health related fields
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FLD_DESC_ENT(RDC_HEALTH_XGMI_ERROR, "XGMI one or more errors detected", "XGMI_ERROR", true)
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FLD_DESC_ENT(RDC_HEALTH_PCIE_REPLAY_COUNT, "Total PCIE replay count", "PCIE_REPLAY_COUNT", true)
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FLD_DESC_ENT(RDC_HEALTH_RETIRED_PAGE_NUM, "Retired page number", "RETIRED_PAGE_NUM", true)
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FLD_DESC_ENT(RDC_HEALTH_PENDING_PAGE_NUM, "Pending page number", "PENDING_PAGE_NUM", true)
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FLD_DESC_ENT(RDC_HEALTH_RETIRED_PAGE_LIMIT, "Retired page limit", "RETIRED_PAGE_LIMIT", true)
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FLD_DESC_ENT(RDC_HEALTH_EEPROM_CONFIG_VALID, "Verify checksum of EEPROM", "EEPROM_CONFIG_VALID", true)
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FLD_DESC_ENT(RDC_HEALTH_POWER_THROTTLE_TIME, "Power throttle status counter", "POWER_THROTTLE_TIME", true)
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FLD_DESC_ENT(RDC_HEALTH_THERMAL_THROTTLE_TIME, "Total time(ms) in thermal throttle status", "THERMAL_THROTTLE_TIME", true)
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FLD_DESC_ENT(RDC_HEALTH_VIOLATION_COUNTER, "Accumulated violation counter", "VIOLATION_COUNTER", true)
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FLD_DESC_ENT(RDC_HEALTH_PROCHOT_RESIDENCY_ACC, "Processor hot violation accumulated count", "PROCHOT_ACC", true)
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FLD_DESC_ENT(RDC_HEALTH_PROCHOT_RESIDENCY_PCT, "Processor hot violation percentage", "PROCHOT_PCT", true)
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FLD_DESC_ENT(RDC_HEALTH_PPT_RESIDENCY_PCT, "PPT power violation percentage", "PPT_PCT", true)
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FLD_DESC_ENT(RDC_HEALTH_SOCKET_THRM_ACC, "Socket thermal violation accumulated count", "SOCKET_THRM_ACC", true)
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FLD_DESC_ENT(RDC_HEALTH_SOCKET_THRM_PCT, "Socket thermal violation percentage", "SOCKET_THRM_PCT", true)
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FLD_DESC_ENT(RDC_HEALTH_VR_THRM_ACC, "VR thermal violation accumulated count", "VR_THRM_ACC", true)
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FLD_DESC_ENT(RDC_HEALTH_VR_THRM_PCT, "VR thermal violation percentage", "VR_THRM_PCT", true)
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FLD_DESC_ENT(RDC_HEALTH_HBM_THRM_ACC, "HBM thermal violation accumulated count", "HBM_THRM_ACC", true)
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FLD_DESC_ENT(RDC_HEALTH_HBM_THRM_PCT, "HBM thermal violation percentage", "HBM_THRM_PCT", true)
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FLD_DESC_ENT(RDC_HEALTH_GFX_CLK_LMT_PWR_ACC, "Gfx clk below host limit power acc count", "GFX_CLK_PWR_ACC", true)
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FLD_DESC_ENT(RDC_HEALTH_GFX_CLK_LMT_PWR_PCT, "Gfx clk below host limit power violation %", "GFX_CLK_PWR_PCT", true)
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FLD_DESC_ENT(RDC_HEALTH_GFX_CLK_LMT_THM_ACC, "Gfx clk below host limit thermal acc count", "GFX_CLK_THM_ACC", true)
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FLD_DESC_ENT(RDC_HEALTH_GFX_CLK_LMT_THM_PCT, "Gfx clk below host limit thermal viol %", "GFX_CLK_THM_PCT", true)
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FLD_DESC_ENT(RDC_HEALTH_LOW_UTIL_ACC, "Low utilization violation accumulated count","LOW_UTIL_ACC", true)
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FLD_DESC_ENT(RDC_HEALTH_LOW_UTIL_PCT, "Low utilization violation percentage", "LOW_UTIL_PCT", true)
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FLD_DESC_ENT(RDC_HEALTH_GFX_CLK_LMT_TOTAL_ACC, "Gfx clk below host limit total acc count", "GFX_CLK_TOT_ACC", true)
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FLD_DESC_ENT(RDC_HEALTH_GFX_CLK_LMT_TOTAL_PCT, "Gfx clk below host limit total viol %", "GFX_CLK_TOT_PCT", true)
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|
// CPU-related fields description
|
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FLD_DESC_ENT(RDC_FI_CPU_SKT_COUNT, "Number of CPU sockets", "CPU_SKT_COUNT", false)
|
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FLD_DESC_ENT(RDC_FI_CPU_MODEL, "Name of the CPU model", "CPU_MODEL", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_MODEL_ID, "CPU model identifier", "CPU_MODEL_ID", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_FAMILY, "CPU family identifier", "CPU_FAMILY", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_CORES_PER_SKT, "CPU cores per socket identifier", "CPU_CORES_PER_SKT", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_SKT_ENERGY, "CPU socket energy consumption (microjoules)", "CPU_SKT_ENERGY", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_HSMP_DRIVER_VERSION, "HSMP driver version", "CPU_HSMP_DRIVER_VERSION", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_SMU_FW_VERSION, "SMU firmware version", "CPU_SMU_FW_VERSION", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_HSMP_PROTO_VERSION, "HSMP protocol version", "CPU_HSMP_PROTO_VERSION", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_FCLK_FREQUENCY, "CPU fabric clock frequency (MHz)", "CPU_FCLK_FREQUENCY", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_MCLK_FREQUENCY, "CPU memory clock frequency (MHz)", "CPU_MCLK_FREQUENCY", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_CCLK_LIMIT, "CPU core clock limit (MHz)", "CPU_CCLK_LIMIT", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_SKT_ACTIVE_FREQ_LIMIT, "CPU socket active frequency limit (MHz)", "CPU_SKT_ACTIVE_FREQ_LIMIT", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_SKT_FREQ_LIMIT_SRC, "CPU socket frequency limit source type", "CPU_SKT_FREQ_LIMIT_SRC", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_SKT_FREQ_RANGE_MAX, "CPU socket maximum frequency range (MHz)", "CPU_SKT_FREQ_RANGE_MAX", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_SKT_FREQ_RANGE_MIN, "CPU socket minimum frequency range (MHz)", "CPU_SKT_FREQ_RANGE_MIN", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_SKT_C0_RESIDENCY, "CPU socket C0 residency percentage", "CPU_SKT_C0_RESIDENCY", false)
|
|
FLD_DESC_ENT(RDC_FI_CPU_SKT_LCLK_DPM_LEVEL, "CPU socket LCLK DPM level", "CPU_SKT_LCLK_DPM_LEVEL", false)
|