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935 lines
84 KiB
YAML
935 lines
84 KiB
YAML
System Speed-of-Light:
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VALU FLOPs:
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rst: 'The total floating-point operations executed per second on the :ref:`VALU <desc-valu>`. This is also presented as a percent of the peak theoretical FLOPs achievable on the specific accelerator. Note: this does not include any floating-point operations from :ref:`MFMA <desc-mfma>` instructions.'
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unit: GFLOP/s
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MFMA FLOPs (F8):
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rst: 'The total number of 8-bit brain floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 16-bit brain floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical F8 MFMA operations achievable on the specific accelerator. It is supported on AMD Instinct MI300 series and later only.'
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unit: GFLOP/s
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MFMA FLOPs (BF16):
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rst: 'The total number of 16-bit brain floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 16-bit brain floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical BF16 MFMA operations achievable on the specific accelerator.'
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unit: GFLOP/s
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MFMA FLOPs (F16):
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rst: 'The total number of 16-bit floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 16-bit floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical F16 MFMA operations achievable on the specific accelerator.'
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unit: GFLOP/s
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MFMA FLOPs (F32):
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rst: 'The total number of 32-bit floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 32-bit floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical F32 MFMA operations achievable on the specific accelerator.'
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unit: GFLOP/s
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MFMA FLOPs (F64):
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rst: 'The total number of 64-bit floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 64-bit floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical F64 MFMA operations achievable on the specific accelerator.'
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unit: GFLOP/s
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MFMA IOPs (Int8):
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rst: 'The total number of 8-bit integer :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 8-bit integer operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical INT8 MFMA operations achievable on the specific accelerator.'
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unit: GIOP/s
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Active CUs (deprecated):
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rst: Total number of active compute units (CUs) on the accelerator during the kernel execution. (Deprecated - See CU Utilization instead)
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unit: CUs
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SALU Utilization:
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rst: Indicates what percent of the kernel's duration the :ref:`SALU <desc-salu>` was busy executing instructions. Computed as the ratio of the total number of cycles spent by the :ref:`scheduler <desc-scheduler>` issuing SALU / :ref:`SMEM <desc-smem>` instructions over the :ref:`total CU cycles <total-cu-cycles>`.
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unit: Percent
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VALU Utilization:
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rst: Indicates what percent of the kernel's duration the :ref:`VALU <desc-valu>` was busy executing instructions. Does not include :ref:`VMEM <desc-vmem>` operations. Computed as the ratio of the total number of cycles spent by the :ref:`scheduler <desc-scheduler>` issuing VALU instructions over the :ref:`total CU cycles <total-cu-cycles>`.
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unit: Percent
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MFMA Utilization:
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rst: Indicates what percent of the kernel's duration the :ref:`MFMA <desc-mfma>` unit was busy executing instructions. Computed as the ratio of the total number of cycles spent by the :ref:`MFMA <desc-salu>` was busy over the :ref:`total CU cycles <total-cu-cycles>`.
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unit: Percent
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VMEM Utilization:
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rst: Indicates what percent of the kernel's duration the :ref:`VMEM <desc-vmem>` unit was busy executing instructions, including both global/generic and spill/scratch operations (see the :ref:`VMEM instruction count metrics <ta-instruction-counts>` for more detail). Does not include :ref:`VALU <desc-valu>` operations. Computed as the ratio of the total number of cycles spent by the :ref:`scheduler <desc-scheduler>` issuing VMEM instructions over the :ref:`total CU cycles <total-cu-cycles>`.
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unit: Percent
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Branch Utilization:
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rst: Indicates what percent of the kernel's duration the :ref:`branch <desc-branch>` unit was busy executing instructions. Computed as the ratio of the total number of cycles spent by the :ref:`scheduler <desc-scheduler>` issuing branch instructions over the :ref:`total CU cycles <total-cu-cycles>`.
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unit: Percent
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VALU Active Threads:
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rst: Indicates the average level of :ref:`divergence <desc-divergence>` within a wavefront over the lifetime of the kernel. The number of work-items that were active in a wavefront during execution of each :ref:`VALU <desc-valu>` instruction, time-averaged over all VALU instructions run on all wavefronts in the kernel.
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unit: Work-items
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IPC:
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rst: The ratio of the total number of instructions executed on the :doc:`CU <compute-unit>` over the :ref:`total active CU cycles <total-active-cu-cycles>`.
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unit: Instructions per Cycle
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Wavefront Occupancy:
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rst: 'The time-averaged number of wavefronts resident on the accelerator over the lifetime of the kernel. Note: this metric may be inaccurate for short-running kernels (less than 1ms). This is also presented as a percent of the peak theoretical occupancy achievable on the specific accelerator.'
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unit: Wavefronts
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Theoretical LDS Bandwidth:
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rst: Indicates the maximum amount of bytes that could have been loaded from, stored to, or atomically updated in the LDS per unit time (see :ref:`LDS Bandwidth <lds-bandwidth>` example for more detail). This is also presented as a percent of the peak theoretical F64 MFMA operations achievable on the specific accelerator.
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unit: GB/s
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LDS Bank Conflicts/Access:
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rst: The ratio of the number of cycles spent in the :doc:`LDS scheduler <local-data-share>` due to bank conflicts (as determined by the conflict resolution hardware) to the base number of cycles that would be spent in the LDS scheduler in a completely uncontended case. This is also presented in normalized form (i.e., the Bank Conflict Rate).
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unit: Conflicts per Access
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vL1D Cache Hit Rate:
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rst: The ratio of the number of vL1D cache line requests that hit in vL1D cache over the total number of cache line requests to the :ref:`vL1D cache RAM <desc-tc>`.
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unit: Percent
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vL1D Cache BW:
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rst: The number of bytes looked up in the vL1D cache as a result of :ref:`VMEM <desc-vmem>` instructions per unit time. The number of bytes is calculated as the number of cache lines requested multiplied by the cache line size. This value does not consider partial requests, so e.g., if only a single value is requested in a cache line, the data movement will still be counted as a full cache line. This is also presented as a percent of the peak theoretical bandwidth achievable on the specific accelerator.
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unit: GB/s
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L2 Cache Hit Rate:
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rst: The ratio of the number of L2 cache line requests that hit in the L2 cache over the total number of incoming cache line requests to the L2 cache.
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unit: Percent
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L2 Cache BW:
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rst: The number of bytes looked up in the L2 cache per unit time. The number of bytes is calculated as the number of cache lines requested multiplied by the cache line size. This value does not consider partial requests, so e.g., if only a single value is requested in a cache line, the data movement will still be counted as a full cache line. This is also presented as a percent of the peak theoretical bandwidth achievable on the specific accelerator.
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unit: GB/s
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L2-Fabric Read BW:
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rst: The number of bytes read by the L2 over the :ref:`Infinity Fabric\u2122 interface <l2-fabric>` per unit time. This is also presented as a percent of the peak theoretical bandwidth achievable on the specific accelerator.
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unit: GB/s
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L2-Fabric Write BW:
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rst: The number of bytes sent by the L2 over the :ref:`Infinity Fabric interface <l2-fabric>` by write and atomic operations per unit time. This is also presented as a percent of the peak theoretical bandwidth achievable on the specific accelerator.
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unit: GB/s
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L2-Fabric Read Latency:
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rst: The time-averaged number of cycles read requests spent in Infinity Fabric before data was returned to the L2.
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unit: Cycles
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L2-Fabric Write Latency:
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rst: The time-averaged number of cycles write requests spent in Infinity Fabric before a completion acknowledgement was returned to the L2.
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unit: Cycles
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sL1D Cache Hit Rate:
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rst: The percent of sL1D requests that hit on a previously loaded line the cache. Calculated as the ratio of the number of sL1D requests that hit over the number of all sL1D requests.
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unit: Percent
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sL1D Cache BW:
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rst: The number of bytes looked up in the sL1D cache per unit time. This is also presented as a percent of the peak theoretical bandwidth achievable on the specific accelerator.
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unit: GB/s
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L1I Hit Rate:
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rst: The percent of L1I requests that hit on a previously loaded line the cache. Calculated as the ratio of the number of L1I requests that hit over the number of all L1I requests.
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unit: Percent
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L1I BW:
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rst: The number of bytes looked up in the L1I cache per unit time. This is also presented as a percent of the peak theoretical bandwidth achievable on the specific accelerator.
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unit: GB/s
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L1I Fetch Latency:
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rst: The average number of cycles spent to fetch instructions to a :doc:`CU <compute-unit>`.
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unit: Cycles
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CU Utilization:
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rst: The percent of :ref:`total SIMD cycles <total-simd-cycles>` in the kernel where any :ref:`SIMD <desc-valu>` on a CU was actively doing any work, summed over all CUs. Low values (less than 100%) indicate that the accelerator was not fully saturated by the kernel, or a potential load-imbalance issue.
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unit: Percent
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Roofline Performance Rates:
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VALU FLOPs (F16):
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rst: 'The total 16-bit floating-point operations executed per second on the VALU. This is presented with the value of the peak empirical F16 FLOPs achievable on the specific accelerator. Note: this does not include any F16 operations from MFMA instructions.'
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unit: GFLOP/s
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VALU FLOPs (F32):
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rst: 'The total 32-bit floating-point operations executed per second on the VALU. This is presented with the value of the peak empirical F32 FLOPs achievable on the specific accelerator. Note: this does not include any F32 operations from MFMA instructions.'
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unit: GFLOP/s
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VALU FLOPs (F64):
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rst: 'The total 64-bit floating-point operations executed per second on the VALU. This is presented with the value of the peak empirical F64 FLOPs achievable on the specific accelerator. Note: this does not include any F64 operations from MFMA instructions.'
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unit: GFLOP/s
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MFMA FLOPs (F8):
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rst: The total number of 8-bit brain floating point MFMA operations executed per second. This does not include any 16-bit brain floating point operations from VALU instructions. The peak empirically measured F8 MFMA operations achievable on the specific accelerator is displayed alongside for comparison. It is supported on AMD Instinct MI300 series and later only.
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unit: GFLOP/s
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MFMA FLOPs (BF16):
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rst: 'The total number of 16-bit brain floating point MFMA operations executed per second. Note: this does not include any 16-bit brain floating point operations from VALU instructions. The peak empirically measured BF16 MFMA operations achievable on the specific accelerator is displayed alongside for comparison.'
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unit: GFLOP/s
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MFMA FLOPs (F16):
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rst: 'The total number of 16-bit floating point MFMA operations executed per second. Note: this does not include any 16-bit floating point operations from VALU instructions. The peak empirically measured F16 MFMA operations achievable on the specific accelerator is displayed alongside for comparison.'
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unit: GFLOP/s
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MFMA FLOPs (F32):
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rst: 'The total number of 32-bit floating point MFMA operations executed per second. Note: this does not include any 32-bit floating point operations from VALU instructions. The peak empirically measured F32 MFMA operations achievable on the specific accelerator is displayed alongside for comparison.'
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unit: GFLOP/s
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MFMA FLOPs (F64):
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rst: 'The total number of 64-bit floating point MFMA operations executed per second. Note: this does not include any 64-bit floating point operations from VALU instructions. The peak empirically measured F64 MFMA operations achievable on the specific accelerator is displayed alongside for comparison.'
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unit: GFLOP/s
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MFMA IOPs (Int8):
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rst: 'The total number of 8-bit integer MFMA operations executed per second. Note: this does not include any 8-bit integer operations from VALU instructions. The peak empirically measured INT8 MFMA operations achievable on the specific accelerator is displayed alongside for comparison.'
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unit: GIOP/s
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HBM Bandwidth:
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rst: The total number of bytes read from and written to High-Bandwidth Memory (HBM) per second. The peak empirically measured bandwidth achievable on the specific accelerator is displayed alongside for comparison.
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unit: GB/s
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L2 Cache Bandwidth:
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rst: The number of bytes looked up in the L2 cache per unit time. The number of bytes is calculated as the number of cache lines requested multiplied by the cache line size. This value does not consider partial requests, so e.g., if only a single value is requested in a cache line, the data movement will still be counted as a full cache line. The peak empirically measured bandwidth achievable on the specific accelerator is displayed alongside for comparison.
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unit: GB/s
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L1 Cache Bandwidth:
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rst: The number of bytes looked up in the vL1D cache as a result of VMEM instructions per unit time. The number of bytes is calculated as the number of cache lines requested multiplied by the cache line size. This value does not consider partial requests, so e.g., if only a single value is requested in a cache line, the data movement will still be counted as a full cache line. The peak empirically measured bandwidth achievable on the specific accelerator is displayed alongside for comparison.
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unit: GB/s
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LDS Bandwidth:
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rst: Indicates the maximum amount of bytes that could have been loaded from, stored to, or atomically updated in the LDS per unit time (see LDS Bandwidth example for more detail). The peak empirically measured LDS bandwidth achievable on the specific accelerator is displayed alongside for comparison.
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unit: GB/s
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Roofline Plot Points:
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AI L1:
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rst: The Arithmetic Intensity (AI) relative to the L1 Cache. It is the ratio of total floating-point operations (FLOPs) to total bytes transferred between the L1 cache and the processing units.
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unit: FLOPs/Byte
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AI L2:
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rst: The Arithmetic Intensity (AI) relative to the L2 Cache. It is the ratio of total floating-point operations (FLOPs) to total bytes transferred between the L2 cache and the L1 cache.
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unit: FLOPs/Byte
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AI HBM:
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rst: The Arithmetic Intensity (AI) relative to High-Bandwidth Memory (HBM). It is the ratio of total floating-point operations (FLOPs) to total bytes transferred between HBM and the L2 cache.
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unit: FLOPs/Byte
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AI LDS:
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rst: Arithmetic Intensity relative to the Local Data Share (LDS). Higher values indicate more compute per byte of LDS traffic, suggesting effective reuse of shared data within a workgroup. Lower values suggest memory-bound behavior limited by LDS bandwidth or bank-conflict pressure.
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unit: FLOPs/Byte
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Performance (GFLOPs):
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rst: The overall achieved performance, measured in GigaFLOPs per second (GFLOP/s). This is calculated as the sum of all VALU and MFMA floating-point operations divided by the total execution time. This value is used as the y-coordinate for the kernel's point on the Roofline plot.
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unit: GFLOP/s
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Command processor fetcher (CPF):
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CPF Utilization:
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rst: Percent of total cycles where the CPF was busy actively doing any work. The ratio of CPF busy cycles over total cycles counted by the CPF.
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unit: Percent
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CPF Stall:
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rst: Percent of CPF busy cycles where the CPF was stalled for any reason.
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unit: Percent
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CPF-L2 Utilization:
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rst: Percent of total cycles counted by the CPF-:doc:`L2 <l2-cache>` interface where the CPF-L2 interface was active doing any work. The ratio of CPF-L2 busy cycles over total cycles counted by the CPF-L2.
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unit: Percent
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CPF-L2 Stall:
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rst: Percent of CPF-:doc:`L2 <l2-cache>` L2 busy cycles where the CPF-L2 interface was stalled for any reason.
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unit: Percent
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CPF-UTCL1 Stall:
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rst: Percent of CPF busy cycles where the CPF was stalled by address translation.
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unit: Percent
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Command processor packet processor (CPC):
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CPC Utilization:
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rst: Percent of total cycles where the CPC was busy actively doing any work. The ratio of CPC busy cycles over total cycles counted by the CPC.
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unit: Percent
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CPC Stall Rate:
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rst: Percent of CPC busy cycles where the CPC was stalled for any reason.
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unit: Percent
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CPC Packet Decoding Utilization:
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rst: Percent of CPC busy cycles spent decoding commands for processing.
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unit: Percent
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CPC-Workgroup Manager Utilization:
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rst: Percent of CPC busy cycles spent dispatching workgroups to the :ref:`workgroup manager <desc-spi>`.
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unit: Percent
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CPC-L2 Utilization:
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rst: Percent of total cycles counted by the CPC-:doc:`L2 <l2-cache>` interface where the CPC-L2 interface was active doing any work.
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unit: Percent
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CPC-UTCL1 Stall:
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rst: Percent of CPC busy cycles where the CPC was stalled by address translation
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unit: Percent
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CPC-UTCL2 Utilization:
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rst: Percent of total cycles counted by the CPC's :doc:`L2 <l2-cache>` address translation interface where the CPC was busy doing address translation work.
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unit: Percent
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Workgroup manager utilizations:
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Accelerator Utilization:
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rst: The percent of cycles in the kernel where the accelerator was actively doing any work.
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unit: Percent
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Scheduler-Pipe Utilization:
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rst: 'The percent of :ref:`total scheduler-pipe cycles <total-pipe-cycles>` in the kernel where the scheduler-pipes were actively doing any work. Note: this value is expected to range between 0% and 25%. See :ref:`desc-spi`.'
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unit: Percent
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Workgroup Manager Utilization:
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rst: The percent of cycles in the kernel where the workgroup manager was actively doing any work.
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unit: Percent
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Shader Engine Utilization:
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rst: The percent of :ref:`total shader engine cycles <total-se-cycles>` in the kernel where any CU in a shader-engine was actively doing any work, normalized over all shader-engines. Low values (e.g., << 100%) indicate that the accelerator was not fully saturated by the kernel, or a potential load-imbalance issue.
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unit: Percent
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SIMD Utilization:
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rst: The percent of :ref:`total SIMD cycles <total-simd-cycles>` in the kernel where any :ref:`SIMD <desc-valu>` on a CU was actively doing any work, summed over all CUs. Low values (less than 100%) indicate that the accelerator was not fully saturated by the kernel, or a potential load-imbalance issue.
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unit: Percent
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Dispatched Workgroups:
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rst: The total number of workgroups forming this kernel launch.
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unit: Workgroups
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Dispatched Wavefronts:
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rst: The total number of wavefronts, summed over all workgroups, forming this kernel launch.
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unit: Wavefronts
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VGPR Writes:
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rst: The average number of cycles spent initializing :ref:`VGPRs <desc-valu>` at wave creation.
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unit: Cycles/wave
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SGPR Writes:
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rst: The average number of cycles spent initializing :ref:`SGPRs <desc-salu>` at wave creation.
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unit: Cycles/wave
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Workgroup Manager - Resource Allocation:
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Not-scheduled Rate (Workgroup Manager):
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rst: 'The percent of :ref:`total scheduler-pipe cycles <total-pipe-cycles>` in the kernel where a workgroup could not be scheduled to a :doc:`CU <compute-unit>` due to a bottleneck within the workgroup manager rather than a lack of a CU or :ref:`SIMD <desc-valu>` with sufficient resources. Note: this value is expected to range between 0-25%. See note in :ref:`workgroup manager <desc-spi>` description.'
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unit: Percent
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Not-scheduled Rate (Scheduler-Pipe):
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rst: 'The percent of :ref:`total scheduler-pipe cycles <total-pipe-cycles>` in the kernel where a workgroup could not be scheduled to a :doc:`CU <compute-unit>` due to a bottleneck within the scheduler-pipes rather than a lack of a CU or :ref:`SIMD <desc-valu>` with sufficient resources. Note: this value is expected to range between 0-25%, see note in :ref:`workgroup manager <desc-spi>` description.'
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unit: Percent
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Scheduler-Pipe Stall Rate:
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rst: 'The percent of :ref:`total scheduler-pipe cycles <total-pipe-cycles>` in the kernel where a workgroup could not be scheduled to a :doc:`CU <compute-unit>` due to occupancy limitations (like a lack of a CU or :ref:`SIMD <desc-valu>` with sufficient resources). Note: this value is expected to range between 0-25%, see note in :ref:`workgroup manager <desc-spi>` description.'
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unit: Percent
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Scratch Stall Rate:
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rst: The percent of :ref:`total shader-engine cycles <total-se-cycles>` in the kernel where a workgroup could not be scheduled to a :doc:`CU <compute-unit>` due to lack of :ref:`private (a.k.a., scratch) memory <memory-type>` slots. While this can reach up to 100%, note that the actual occupancy limitations on a kernel using private memory are typically quite small (for example, less than 1% of the total number of waves that can be scheduled to an accelerator).
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unit: Percent
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Insufficient SIMD Waveslots:
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rst: The percent of :ref:`total SIMD cycles <total-simd-cycles>` in the kernel where a workgroup could not be scheduled to a :ref:`SIMD <desc-valu>` due to lack of available :ref:`waveslots <desc-valu>`.
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unit: Percent
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Insufficient SIMD VGPRs:
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rst: The percent of :ref:`total SIMD cycles <total-simd-cycles>` in the kernel where a workgroup could not be scheduled to a :ref:`SIMD <desc-valu>` due to lack of available :ref:`VGPRs <desc-valu>`.
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unit: Percent
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Insufficient SIMD SGPRs:
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rst: The percent of :ref:`total SIMD cycles <total-simd-cycles>` in the kernel where a workgroup could not be scheduled to a :ref:`SIMD <desc-valu>` due to lack of available :ref:`SGPRs <desc-salu>`.
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unit: Percent
|
|
Insufficient CU LDS:
|
|
rst: The percent of :ref:`total CU cycles <total-cu-cycles>` in the kernel where a workgroup could not be scheduled to a :doc:`CU <compute-unit>` due to lack of available :doc:`LDS <local-data-share>`.
|
|
unit: Percent
|
|
Insufficient CU Barriers:
|
|
rst: The percent of :ref:`total CU cycles <total-cu-cycles>` in the kernel where a workgroup could not be scheduled to a :doc:`CU <compute-unit>` due to lack of available :ref:`barriers <desc-barrier>`.
|
|
unit: Percent
|
|
Reached CU Workgroup Limit:
|
|
rst: The percent of :ref:`total CU cycles <total-cu-cycles>` in the kernel where a workgroup could not be scheduled to a :doc:`CU <compute-unit>` due to limits within the workgroup manager. This is expected to be always be zero on CDNA2 or newer accelerators (and small for previous accelerators).
|
|
unit: Percent
|
|
Reached CU Wavefront Limit:
|
|
rst: The percent of :ref:`total CU cycles <total-cu-cycles>` in the kernel where a wavefront could not be scheduled to a :doc:`CU <compute-unit>` due to limits within the workgroup manager. This is expected to be always be zero on CDNA2 or newer accelerators (and small for previous accelerators).
|
|
unit: Percent
|
|
Wavefront launch stats:
|
|
Grid Size:
|
|
rst: The total number of work-items (or, threads) launched as a part of the kernel dispatch. In HIP, this is equivalent to the total grid size multiplied by the total workgroup (or, block) size.
|
|
unit: Work-items
|
|
Workgroup Size:
|
|
rst: The total number of work-items (or, threads) in each workgroup (or, block) launched as part of the kernel dispatch. In HIP, this is equivalent to the total block size.
|
|
unit: Work-items
|
|
Total Wavefronts:
|
|
rst: The total number of wavefronts launched as part of the kernel dispatch. On AMD Instinct\u2122 CDNA\u2122 accelerators and GCN\u2122 GPUs, the wavefront size is always 64 work-items. Thus, the total number of wavefronts should be equivalent to the ceiling of grid size divided by 64.
|
|
unit: Wavefronts
|
|
Saved Wavefronts:
|
|
rst: The total number of wavefronts saved at a context-save. See `cwsr_enable <https://docs.kernel.org/gpu/amdgpu/module-parameters.html?highlight=cwsr>`_.
|
|
unit: Wavefronts
|
|
Restored Wavefronts:
|
|
rst: The total number of wavefronts restored from a context-save. See `cwsr_enable <https://docs.kernel.org/gpu/amdgpu/module-parameters.html?highlight=cwsr>`_.
|
|
unit: Wavefronts
|
|
VGPRs:
|
|
rst: 'The number of architected vector general-purpose registers allocated for the kernel, see :ref:`VALU <desc-valu>`. Note: this may not exactly match the number of VGPRs requested by the compiler due to allocation granularity.'
|
|
unit: Registers
|
|
AGPRs:
|
|
rst: 'The number of accumulation vector general-purpose registers allocated for the kernel, see :ref:`AGPRs <desc-agprs>`. Note: this may not exactly match the number of AGPRs requested by the compiler due to allocation granularity.'
|
|
unit: Registers
|
|
SGPRs:
|
|
rst: 'The number of scalar general-purpose registers allocated for the kernel, see :ref:`SALU <desc-salu>`. Note: this may not exactly match the number of SGPRs requested by the compiler due to allocation granularity.'
|
|
unit: Registers
|
|
LDS Allocation:
|
|
rst: 'The number of bytes of LDS memory (or, shared memory) allocated for this kernel. Note: This may also be larger than what was requested at compile time due to both allocation granularity and dynamic per-dispatch LDS allocations.'
|
|
unit: Bytes
|
|
Scratch Allocation:
|
|
rst: The number of bytes of scratch memory requested per work-item for this kernel. Scratch memory is used for stack memory on the accelerator, as well as for register spills and restores.
|
|
unit: Bytes per Work-item
|
|
Wavefront runtime stats:
|
|
Kernel Time:
|
|
rst: The total duration of the executed kernel.
|
|
unit: Nanoseconds
|
|
Kernel Time (Cycles):
|
|
rst: The total duration of the executed kernel in cycles.
|
|
unit: Cycles
|
|
Instructions per wavefront:
|
|
rst: The average number of instructions (of all types) executed per wavefront. This is averaged over all wavefronts in a kernel dispatch.
|
|
unit: Instructions per Wavefront
|
|
Wave Cycles:
|
|
rst: 'The number of cycles a wavefront in the kernel dispatch spent resident on a compute unit per :ref:`normalization unit <normalization-units>`. This is averaged over all wavefronts in a kernel dispatch. Note: this should not be directly compared to the kernel cycles above.'
|
|
unit: Cycles per Normalization Unit
|
|
Dependency Wait Cycles:
|
|
rst: The number of cycles a wavefront in the kernel dispatch stalled waiting on memory of any kind (e.g., instruction fetch, vector or scalar memory, etc.) per :ref:`normalization unit <normalization-units>`. This counter is incremented at every cycle by *all* wavefronts on a CU stalled at a memory operation. As such, it is most useful to get a sense of how waves were spending their time, rather than identification of a precise limiter because another wave could be actively executing while a wave is stalled. The sum of this metric, Issue Wait Cycles and Active Cycles should be equal to the total Wave Cycles metric.
|
|
unit: Cycles per Normalization Unit
|
|
Issue Wait Cycles:
|
|
rst: The number of cycles a wavefront in the kernel dispatch was unable to issue an instruction for any reason (e.g., execution pipe back-pressure, arbitration loss, etc.) per :ref:`normalization unit <normalization-units>`. This counter is incremented at every cycle by *all* wavefronts on a CU unable to issue an instruction. As such, it is most useful to get a sense of how waves were spending their time, rather than identification of a precise limiter because another wave could be actively executing while a wave is issue stalled. The sum of this metric, Dependency Wait Cycles and Active Cycles should be equal to the total Wave Cycles metric.
|
|
unit: Cycles per Normalization Unit
|
|
Active Cycles:
|
|
rst: The average number of cycles a wavefront in the kernel dispatch was actively executing instructions per :ref:`normalization unit <normalization-units>`. This measurement is made on a per-wavefront basis, and may include cycles that another wavefront spent actively executing (on another execution unit, for example) or was stalled. As such, it is most useful to get a sense of how waves were spending their time, rather than identification of a precise limiter. The sum of this metric, Issue Wait Cycles and Active Wait Cycles should be equal to the total Wave Cycles metric.
|
|
unit: Cycles per Normalization Unit
|
|
Wavefront Occupancy:
|
|
rst: 'The time-averaged number of wavefronts resident on the accelerator over the lifetime of the kernel. Note: this metric may be inaccurate for short-running kernels (less than 1ms).'
|
|
unit: Wavefronts
|
|
Overall instruction mix:
|
|
VALU:
|
|
rst: The total number of vector arithmetic logic unit (VALU) operations issued. These are the workhorses of the :doc:`compute unit <compute-unit>`, and are used to execute a wide range of instruction types including floating point operations, non-uniform address calculations, transcendental operations, integer operations, shifts, conditional evaluation, etc.
|
|
unit: Instructions per Normalization Unit
|
|
VMEM:
|
|
rst: The total number of vector memory operations issued. These include most loads, stores and atomic operations and all accesses to :ref:`generic, global, private and texture <memory-spaces>` memory.
|
|
unit: Instructions per Normalization Unit
|
|
LDS:
|
|
rst: The total number of LDS (also known as shared memory) operations issued. These include loads, stores, atomics, and HIP's ``__shfl`` operations.
|
|
unit: Instructions per Normalization Unit
|
|
MFMA:
|
|
rst: The total number of matrix fused multiply-add instructions issued.
|
|
unit: Instructions per Normalization Unit
|
|
SALU:
|
|
rst: The total number of scalar arithmetic logic unit (SALU) operations issued. Typically these are used for address calculations, literal constants, and other operations that are provably uniform across a wavefront. Although scalar memory (SMEM) operations are issued by the SALU, they are counted separately in this section.
|
|
unit: Instructions per Normalization Unit
|
|
SMEM:
|
|
rst: The total number of scalar memory (SMEM) operations issued. These are typically used for loading kernel arguments, base-pointers and loads from HIP's ``__constant__`` memory.
|
|
unit: Instructions per Normalization Unit
|
|
Branch:
|
|
rst: The total number of branch operations issued. These typically consist of jump or branch operations and are used to implement control flow.
|
|
unit: Instructions per Normalization Unit
|
|
VALU arithmetic instruction mix:
|
|
INT32:
|
|
rst: The total number of instructions operating on 32-bit integer operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
INT64:
|
|
rst: The total number of instructions operating on 64-bit integer operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F16-ADD:
|
|
rst: The total number of addition instructions operating on 16-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F16-MUL:
|
|
rst: The total number of multiplication instructions operating on 16-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F16-FMA:
|
|
rst: The total number of fused multiply-add instructions operating on 16-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F16-Trans:
|
|
rst: The total number of transcendental instructions (e.g., `sqrt`) operating on 16-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F32-ADD:
|
|
rst: The total number of addition instructions operating on 32-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F32-MUL:
|
|
rst: The total number of multiplication instructions operating on 32-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F32-FMA:
|
|
rst: The total number of fused multiply-add instructions operating on 32-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F32-Trans:
|
|
rst: The total number of transcendental instructions (such as ``sqrt``) operating on 32-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F64-ADD:
|
|
rst: The total number of addition instructions operating on 64-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F64-MUL:
|
|
rst: The total number of multiplication instructions operating on 64-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F64-FMA:
|
|
rst: The total number of fused multiply-add instructions operating on 64-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
F64-Trans:
|
|
rst: The total number of transcendental instructions (such as `sqrt`) operating on 64-bit floating-point operands issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Conversion:
|
|
rst: The total number of type conversion instructions (such as converting data to or from F32\u2194F64) issued to the VALU per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Matrix instruction mix:
|
|
MFMA-I8:
|
|
rst: The total number of 8-bit integer :ref:`MFMA <desc-mfma>` instructions issued per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
MFMA-F8:
|
|
rst: The total number of 8-bit floating point :ref:`MFMA <desc-mfma>` instructions issued per :ref:`normalization unit <normalization-units>`. This is supported in AMD Instinct MI300 series and later only.
|
|
unit: Instructions per Normalization Unit
|
|
MFMA-F16:
|
|
rst: The total number of 16-bit floating point :ref:`MFMA <desc-mfma>` instructions issued per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
MFMA-BF16:
|
|
rst: The total number of 16-bit brain floating point :ref:`MFMA <desc-mfma>` instructions issued per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
MFMA-F32:
|
|
rst: The total number of 32-bit floating-point :ref:`MFMA <desc-mfma>` instructions issued per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
MFMA-F64:
|
|
rst: The total number of 64-bit floating-point :ref:`MFMA <desc-mfma>` instructions issued per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Compute Speed-of-Light:
|
|
VALU FLOPs:
|
|
rst: 'The total floating-point operations executed per second on the :ref:`VALU <desc-valu>`. This is also presented as a percent of the peak theoretical FLOPs achievable on the specific accelerator. Note: this does not include any floating-point operations from :ref:`MFMA <desc-mfma>` instructions.'
|
|
unit: GFLOPs
|
|
MFMA FLOPs (F8):
|
|
rst: 'The total number of 8-bit floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 8-bit floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical F8 MFMA operations achievable on the specific accelerator.'
|
|
unit: GFLOPs
|
|
MFMA FLOPs (BF16):
|
|
rst: 'The total number of 16-bit brain floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 16-bit brain floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical BF16 MFMA operations achievable on the specific accelerator.'
|
|
unit: GFLOPs
|
|
MFMA FLOPs (F16):
|
|
rst: 'The total number of 16-bit floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 16-bit floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical F16 MFMA operations achievable on the specific accelerator.'
|
|
unit: GFLOPs
|
|
MFMA FLOPs (F32):
|
|
rst: 'The total number of 32-bit floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 32-bit floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical F32 MFMA operations achievable on the specific accelerator.'
|
|
unit: GFLOPs
|
|
MFMA FLOPs (F64):
|
|
rst: 'The total number of 64-bit floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 64-bit floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical F64 MFMA operations achievable on the specific accelerator. The total number of 64-bit floating point :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 64-bit floating point operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical F64 MFMA operations achievable on the specific accelerator.'
|
|
unit: GFLOPs
|
|
MFMA IOPs (INT8):
|
|
rst: 'The total number of 8-bit integer :ref:`MFMA <desc-mfma>` operations executed per second. Note: this does not include any 8-bit integer operations from :ref:`VALU <desc-valu>` instructions. This is also presented as a percent of the peak theoretical INT8 MFMA operations achievable on the specific accelerator.'
|
|
unit: GIOPs
|
|
Pipeline statistics:
|
|
IPC:
|
|
rst: The ratio of the total number of instructions executed on the :doc:`CU <compute-unit>` over the :ref:`total active CU cycles <total-active-cu-cycles>`.
|
|
unit: Instructions per Cycle
|
|
IPC (Issued):
|
|
rst: The ratio of the total number of (non-:ref:`internal <ipc-internal-instructions>`) instructions issued over the number of cycles where the :ref:`scheduler <desc-scheduler>` was actively working on issuing instructions. Refer to the :ref:`Issued IPC <issued-ipc>` example for further detail.
|
|
unit: Instructions per Cycle
|
|
SALU Utilization:
|
|
rst: Indicates what percent of the kernel's duration the :ref:`SALU <desc-salu>` was busy executing instructions. Computed as the ratio of the total number of cycles spent by the :ref:`scheduler <desc-scheduler>` issuing SALU / :ref:`SMEM <desc-smem>` instructions over the :ref:`total CU cycles <total-cu-cycles>`.
|
|
unit: Percent
|
|
VALU Utilization:
|
|
rst: Indicates what percent of the kernel's duration the :ref:`VALU <desc-valu>` was busy executing instructions. Does not include :ref:`VMEM <desc-vmem>` operations. Computed as the ratio of the total number of cycles spent by the :ref:`scheduler <desc-scheduler>` issuing VALU instructions over the :ref:`total CU cycles <total-cu-cycles>`.
|
|
unit: Percent
|
|
VMEM Utilization:
|
|
rst: Indicates what percent of the kernel's duration the :ref:`VMEM <desc-vmem>` unit was busy executing instructions, including both global/generic and spill/scratch operations (see the :ref:`VMEM instruction count metrics <ta-instruction-counts>` for more detail). Does not include :ref:`VALU <desc-valu>` operations. Computed as the ratio of the total number of cycles spent by the :ref:`scheduler <desc-scheduler>` issuing VMEM instructions over the :ref:`total CU cycles <total-cu-cycles>`.
|
|
unit: Percent
|
|
Branch Utilization:
|
|
rst: Indicates what percent of the kernel's duration the :ref:`branch <desc-branch>` unit was busy executing instructions. Computed as the ratio of the total number of cycles spent by the :ref:`scheduler <desc-scheduler>` issuing branch instructions over the :ref:`total CU cycles <total-cu-cycles>`.
|
|
unit: Percent
|
|
VALU Active Threads:
|
|
rst: Indicates the average level of :ref:`divergence <desc-divergence>` within a wavefront over the lifetime of the kernel. The number of work-items that were active in a wavefront during execution of each :ref:`VALU <desc-valu>` instruction, time-averaged over all VALU instructions run on all wavefronts in the kernel.
|
|
unit: Work-items
|
|
MFMA Utilization:
|
|
rst: Indicates what percent of the kernel's duration the :ref:`MFMA <desc-mfma>` unit was busy executing instructions. Computed as the ratio of the total number of cycles spent by the :ref:`MFMA <desc-salu>` was busy over the :ref:`total CU cycles <total-cu-cycles>`.
|
|
unit: Percent
|
|
MFMA Instruction Cycles:
|
|
rst: The average duration of :ref:`MFMA <desc-mfma>` instructions in this kernel in cycles. Computed as the ratio of the total number of cycles the MFMA unit was busy over the total number of MFMA instructions. Compare to, for example, the `AMD Matrix Instruction Calculator <https://github.com/RadeonOpenCompute/amd_matrix_instruction_calculator>`_.
|
|
unit: Cycles per Instruction
|
|
VMEM Latency:
|
|
rst: The average number of round-trip cycles (that is, from issue to data return / acknowledgment) required for a VMEM instruction to complete.
|
|
unit: Cycles
|
|
SMEM Latency:
|
|
rst: The average number of round-trip cycles (that is, from issue to data return / acknowledgment) required for a SMEM instruction to complete.
|
|
unit: Cycles
|
|
Arithmetic operations:
|
|
FLOPs (Total):
|
|
rst: The total number of floating-point operations executed on either the :ref:`VALU <desc-valu>` or :ref:`MFMA <desc-mfma>` units, per :ref:`normalization unit <normalization-units>`.
|
|
unit: FLOPs per Normalization Unit
|
|
IOPs (Total):
|
|
rst: The total number of integer operations executed on either the :ref:`VALU <desc-valu>` or :ref:`MFMA <desc-mfma>` units, per :ref:`normalization unit <normalization-units>`.
|
|
unit: IOPS per Normalization Unit
|
|
F8 OPs:
|
|
rst: The total number of 8-bit floating-point MFMA operations executed, per normalization unit.
|
|
unit: FLOPs per Normalization Unit
|
|
F16 OPs:
|
|
rst: The total number of 16-bit floating-point operations executed on either the :ref:`VALU <desc-valu>` or :ref:`MFMA <desc-mfma>` units, per :ref:`normalization unit <normalization-units>`.
|
|
unit: FLOPs per Normalization Unit
|
|
BF16 OPs:
|
|
rst: 'The total number of 16-bit brain floating-point operations executed on either the :ref:`VALU <desc-valu>` or :ref:`MFMA <desc-mfma>` units, per :ref:`normalization unit <normalization-units>`. Note: on current CDNA accelerators, the VALU has no native BF16 instructions.'
|
|
unit: FLOPs per Normalization Unit
|
|
F32 OPs:
|
|
rst: The total number of 32-bit floating-point operations executed on either the :ref:`VALU <desc-valu>` or :ref:`MFMA <desc-mfma>` units, per :ref:`normalization unit <normalization-units>`.
|
|
unit: FLOPs per Normalization Unit
|
|
F64 OPs:
|
|
rst: The total number of 64-bit floating-point operations executed on either the :ref:`VALU <desc-valu>` or :ref:`MFMA <desc-mfma>` units, per :ref:`normalization unit <normalization-units>`.
|
|
unit: FLOPs per Normalization Unit
|
|
INT8 OPs:
|
|
rst: 'The total number of 8-bit integer operations executed on either the :ref:`VALU <desc-valu>` or :ref:`MFMA <desc-mfma>` units, per :ref:`normalization unit <normalization-units>`. Note: on current CDNA accelerators, the VALU has no native INT8 instructions.'
|
|
unit: IOPS per Normalization Unit
|
|
LDS Speed-of-Light:
|
|
Utilization:
|
|
rst: Indicates what percent of the kernel's duration the :ref:`LDS <desc-lds>` was actively executing instructions (including, but not limited to, load, store, atomic and HIP's ``__shfl`` operations). Calculated as the ratio of the total number of cycles LDS was active over the :ref:`total CU cycles <total-cu-cycles>`.
|
|
unit: Percent
|
|
Access Rate:
|
|
rst: Indicates the percentage of SIMDs in the :ref:`VALU <desc-valu>` [#lds-workload]_ actively issuing LDS instructions, averaged over the lifetime of the kernel. Calculated as the ratio of the total number of cycles spent by the :ref:`scheduler <desc-scheduler>` issuing :ref:`LDS <desc-lds>` instructions over the :ref:`total CU cycles <total-cu-cycles>`.
|
|
unit: Percent
|
|
Theoretical Bandwidth Utilization:
|
|
rst: Indicates the maximum amount of bytes that could have been loaded from, stored to, or atomically updated in the LDS divided as percentage of theoretical peak. Does *not* take into account the execution mask of the wavefront when the instruction was executed. See the :ref:`LDS bandwidth example <lds-bandwidth>` for more detail.
|
|
unit: Percent
|
|
Bank Conflict Rate:
|
|
rst: Indicates the percentage of active LDS cycles that were spent servicing bank conflicts. Calculated as the ratio of LDS cycles spent servicing bank conflicts over the number of LDS cycles that would have been required to move the same amount of data in an uncontended access. [#lds-bank-conflict]_
|
|
unit: Percent
|
|
LDS Statistics:
|
|
Theoretical Bandwidth:
|
|
rst: Indicates the maximum amount of bytes that could have been loaded from, stored to, or atomically updated in the LDS divided by total duration. Does *not* take into account the execution mask of the wavefront when the instruction was executed. See the :ref:`LDS bandwidth example <lds-bandwidth>` for more detail.
|
|
unit: Gbps
|
|
LDS Instructions:
|
|
rst: The total number of LDS instructions (including, but not limited to, read/write/atomics and HIP's ``__shfl`` instructions) executed per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
LDS Latency:
|
|
rst: The average number of round-trip cycles (i.e., from issue to data-return acknowledgment) required for an LDS instruction to complete.
|
|
unit: Cycles
|
|
Bank Conflicts/Access:
|
|
rst: The ratio of the number of cycles spent in the :ref:`LDS scheduler <desc-lds>` due to bank conflicts (as determined by the conflict resolution hardware) to the base number of cycles that would be spent in the LDS scheduler in a completely uncontended case. This is the unnormalized form of the Bank Conflict Rate.
|
|
unit: Conflicts per Access
|
|
Index Accesses:
|
|
rst: The total number of cycles spent in the :ref:`LDS scheduler <desc-lds>` over all operations per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cycles per Normalization Unit
|
|
Atomic Return Cycles:
|
|
rst: The total number of cycles spent on LDS atomics with return per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cycles per Normalization Unit
|
|
Bank Conflict:
|
|
rst: The total number of cycles spent in the :ref:`LDS scheduler <desc-lds>` due to bank conflicts (as determined by the conflict resolution hardware) per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cycles per Normalization Unit
|
|
Addr Conflict:
|
|
rst: The total number of cycles spent in the :ref:`LDS scheduler <desc-lds>` due to address conflicts (as determined by the conflict resolution hardware) per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cycles per Normalization Unit
|
|
Unaligned Stall:
|
|
rst: The total number of cycles spent in the :ref:`LDS scheduler <desc-lds>` due to stalls from non-dword aligned addresses per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cycles per Normalization Unit
|
|
Mem Violations:
|
|
rst: The total number of out-of-bounds accesses made to the LDS, per :ref:`normalization unit <normalization-units>`. This is unused and expected to be zero in most configurations for modern CDNA\u2122 accelerators.
|
|
unit: Accesses per Normalization Unit
|
|
L1I Speed-of-Light:
|
|
Bandwidth Utilization:
|
|
rst: The number of bytes looked up in the L1I cache, as a percent of the peak theoretical bandwidth. Calculated as the ratio of L1I requests over the :ref:`total L1I cycles <total-l1i-cycles>`.
|
|
unit: Percent
|
|
L1I-L2 Bandwidth Utilization:
|
|
rst: The percent of the peak theoretical L1I \u2192 L2 cache request bandwidth achieved. Calculated as the ratio of the total number of requests from the L1I to the L2 cache over the :ref:`total L1I-L2 interface cycles <total-l1i-cycles>`.
|
|
unit: Percent
|
|
Cache Hit Rate:
|
|
rst: The percent of L1I requests that hit on a previously loaded cache line. Calculated as the ratio of the number of L1I requests that hit over the number of all L1I requests.
|
|
unit: Percent
|
|
L1I cache accesses:
|
|
Cache Hit Rate:
|
|
rst: The percent of L1I requests that hit [#l1i-cache]_ on a previously loaded line the cache. Calculated as the ratio of the number of L1I requests that hit over the number of all L1I requests.
|
|
unit: Percent
|
|
Req:
|
|
rst: The total number of requests made to the L1I per normalization-unit
|
|
unit: Requests per Normalization Unit
|
|
Hits:
|
|
rst: The total number of L1I requests that hit on a previously loaded cache line, per :ref:`normalization-unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Misses - Non Duplicated:
|
|
rst: The total number of L1I requests that missed on a cache line that *were not* already pending due to another request, per :ref:`normalization-unit <normalization-units>`. See note in :ref:`desc-l1i-sol` for more detail.
|
|
unit: Requests per Normalization Unit
|
|
Misses - Duplicated:
|
|
rst: The total number of L1I requests that missed on a cache line that *were* already pending due to another request, per :ref:`normalization-unit <normalization-units>`. See note in :ref:`desc-l1i-sol` for more detail.
|
|
unit: Requests per Normalization Unit
|
|
Instruction Fetch Latency:
|
|
rst: The average number of cycles spent to fetch instructions to a :doc:`CU <compute-unit>`.
|
|
unit: Cycles
|
|
L1I <-> L2 interface:
|
|
L1I-L2 Bandwidth:
|
|
rst: Total number of bytes transferred across L1I - L2 interface divided by total duration.
|
|
unit: Gbps
|
|
Scalar L1D Speed-of-Light:
|
|
Bandwidth Utilization:
|
|
rst: The number of bytes looked up in the sL1D cache, as a percent of the peak theoretical bandwidth. Calculated as the ratio of sL1D requests over the :ref:`total sL1D cycles <total-sl1d-cycles>`.
|
|
unit: Percent
|
|
sL1D-L2 BW Utilization:
|
|
rst: The percentage of the peak theoretical sL1D - L2 interface bandwidth acheived. Calculated as total number of bytes read from, written to, or atomically updated across the sL1D - L2 interface.
|
|
unit: Percent
|
|
Cache Hit Rate:
|
|
rst: Indicates the percent of sL1D requests that hit on a previously loaded cache line. The ratio of the number of sL1D requests that hit over the number of all sL1D requests.
|
|
unit: Percent
|
|
Scalar L1D cache accesses:
|
|
Cache Hit Rate:
|
|
rst: Indicates the percent of sL1D requests that hit on a previously loaded line the cache. The ratio of the number of sL1D requests that hit [#sl1d-cache]_ over the number of all sL1D requests.
|
|
unit: Percent
|
|
Req:
|
|
rst: The total number of requests, of any size or type, made to the sL1D per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Hits:
|
|
rst: The total number of sL1D requests that hit on a previously loaded cache line, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Misses - Non Duplicated:
|
|
rst: The total number of sL1D requests that missed on a cache line that *was not* already pending due to another request, per :ref:`normalization unit <normalization-units>`. See :ref:`desc-sl1d-sol` for more detail.
|
|
unit: Requests per Normalization Unit
|
|
Misses- Duplicated:
|
|
rst: The total number of sL1D requests that missed on a cache line that *was* already pending due to another request, per :ref:`normalization unit <normalization-units>`. See :ref:`desc-sl1d-sol` for more detail.
|
|
unit: Requests per Normalization Unit
|
|
Read Req (Total):
|
|
rst: The total number of sL1D read requests of any size, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Read Req (1 DWord):
|
|
rst: The total number of sL1D read requests made for a single dword of data (4B), per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Read Req (2 DWord):
|
|
rst: The total number of sL1D read requests made for a two dwords of data (8B), per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Read Req (4 DWord):
|
|
rst: The total number of sL1D read requests made for a four dwords of data (16B), per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Read Req (8 DWord):
|
|
rst: The total number of sL1D read requests made for a eight dwords of data (32B), per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Read Req (16 DWord):
|
|
rst: The total number of sL1D read requests made for a sixteen dwords of data (64B), per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Atomic Req:
|
|
rst: The total number of atomic requests to the sL1D, per :ref:`normalization unit <normalization-units>`. Atomic requests to the sL1D are typically unused on current CDNA accelerators.
|
|
unit: Requests per Normalization Unit
|
|
Scalar L1D Cache - L2 Interface:
|
|
sL1D-L2 BW:
|
|
rst: The total number of bytes read from, written to, or atomically updated across the sL1D\u2194:doc:`L2 <l2-cache>` interface, divided by total duration. Note that sL1D writes and atomics are typically unused on current CDNA accelerators, so in the majority of cases this can be interpreted as an sL1D\u2192L2 read bandwidth.
|
|
unit: Gbps
|
|
Atomic Req:
|
|
rst: The total number of atomic requests from sL1D to the :doc:`L2 <l2-cache>`, per :ref:`normalization unit <normalization-units>`. Typically unused on current CDNA accelerators.
|
|
unit: Requests per Normalization Unit
|
|
Read Req:
|
|
rst: The total number of read requests from sL1D to the :doc:`L2 <l2-cache>`, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Write Req:
|
|
rst: The total number of write requests from sL1D to the :doc:`L2 <l2-cache>`, per :ref:`normalization unit <normalization-units>`. Typically unused on current CDNA accelerators.
|
|
unit: Requests per Normalization Unit
|
|
Stall Cycles:
|
|
rst: The total number of cycles the sL1D\u2194 :doc:`L2 <l2-cache>` interface was stalled, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cycles per Normalization Unit
|
|
Busy / stall metrics:
|
|
Address Processing Unit Busy:
|
|
rst: Percent of the :ref:`total CU cycles <total-cu-cycles>` the address processor was busy
|
|
unit: Percent
|
|
Address Stall:
|
|
rst: Percent of the :ref:`total CU cycles <total-cu-cycles>` the address processor was stalled from sending address requests further into the vL1D pipeline
|
|
unit: Percent
|
|
Data Stall:
|
|
rst: Percent of the :ref:`total CU cycles <total-cu-cycles>` the address processor was stalled from sending write/atomic data further into the vL1D pipeline
|
|
unit: Percent
|
|
Data-Processor → Address Stall:
|
|
rst: Percent of :ref:`total CU cycles <total-cu-cycles>` the address processor was stalled waiting to send command data to the :ref:`data processor <desc-td>`
|
|
unit: Percent
|
|
Sequencer → TA Address Stall:
|
|
rst: The number of cycles the sequencer was stalled waiting to send address requests to the address processor due to a full address FIFO, per normalization unit.
|
|
unit: Cycles per Normalization Unit
|
|
Sequencer → TA Command Stall:
|
|
rst: The number of cycles the sequencer was stalled waiting to send commands to the address processor due to a full command FIFO, per normalization unit.
|
|
unit: Cycles per Normalization Unit
|
|
Sequencer → TA Data Stall:
|
|
rst: The number of cycles the sequencer was stalled waiting to send write data to the address processor due to a full data FIFO, per normalization unit.
|
|
unit: Cycles per Normalization Unit
|
|
Instruction counts:
|
|
Total Instructions:
|
|
rst: The total number of memory instructions executed by the address processer over all compute units on the accelerator, per normalization unit.
|
|
unit: Instructions per Normalization Unit
|
|
Global/Generic Instructions:
|
|
rst: The total number of global & generic memory instructions executed on all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Global/Generic Read Instructions:
|
|
rst: The total number of global & generic memory read instructions executed on all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Global/Generic Write Instructions:
|
|
rst: The total number of global & generic memory write instructions executed on all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Global/Generic Atomic Instructions:
|
|
rst: The total number of global & generic memory atomic (with and without return) instructions executed on all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Spill/Stack Instructions:
|
|
rst: The total number of spill/stack memory instructions executed on all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Spill/Stack Read Instructions:
|
|
rst: The total number of spill/stack memory read instructions executed on all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Spill/Stack Write Instructions:
|
|
rst: The total number of spill/stack memory write instructions executed on all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Spill/Stack Atomic Instructions:
|
|
rst: The total number of spill/stack memory atomic (with and without return) instructions executed on all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`. Typically unused as these memory operations are typically used to implement thread-local storage.
|
|
unit: Instructions per Normalization Unit
|
|
Spill / stack metrics:
|
|
Spill/Stack Total Cycles:
|
|
rst: The number of cycles the address processing unit spent working on spill/stack instructions, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cycles per Normalization Unit
|
|
Spill/Stack Coalesced Read:
|
|
rst: The number of cycles the address processing unit spent working on coalesced spill/stack read instructions, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cycles per Normalization Unit
|
|
Spill/Stack Coalesced Write:
|
|
rst: The number of cycles the address processing unit spent working on coalesced spill/stack write instructions, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cycles per Normalization Unit
|
|
Vector L1 data-return path or Texture Data (TD):
|
|
Data-Return Busy:
|
|
rst: Percent of the :ref:`total CU cycles <total-cu-cycles>` the data-return unit was busy processing or waiting on data to return to the :doc:`CU <compute-unit>`.
|
|
unit: Percent
|
|
Cache RAM → Data-Return Stall:
|
|
rst: Percent of the :ref:`total CU cycles <total-cu-cycles>` the data-return unit was stalled on data to be returned from the :ref:`vL1D Cache RAM <desc-tc>`.
|
|
unit: Percent
|
|
Workgroup manager → Data-Return Stall:
|
|
rst: Percent of the :ref:`total CU cycles <total-cu-cycles>` the data-return unit was stalled by the :ref:`workgroup manager <desc-spi>` due to initialization of registers as a part of launching new workgroups.
|
|
unit: Percent
|
|
Coalescable Instructions:
|
|
rst: The number of instructions submitted to the :ref:`data-return unit <desc-td>` by the :ref:`address processor <desc-ta>` that were found to be coalescable, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Instructions per Normalization Unit
|
|
Read Instructions:
|
|
rst: The number of read instructions submitted to the :ref:`data-return unit <desc-td>` by the :ref:`address processor <desc-ta>` summed over all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`. This is expected to be the sum of global/generic and spill/stack reads in the :ref:`address processor <desc-ta>`.
|
|
unit: Instructions per Normalization Unit
|
|
Write Instructions:
|
|
rst: The number of store instructions submitted to the :ref:`data-return unit <desc-td>` by the :ref:`address processor <desc-ta>` summed over all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`. This is expected to be the sum of global/generic and spill/stack stores counted by the :ref:`vL1D cache-front-end <ta-instruction-counts>`.
|
|
unit: Instructions per Normalization Unit
|
|
Atomic Instructions:
|
|
rst: The number of atomic instructions submitted to the :ref:`data-return unit <desc-td>` by the :ref:`address processor <desc-ta>` summed over all :doc:`compute units <compute-unit>` on the accelerator, per :ref:`normalization unit <normalization-units>`. This is expected to be the sum of global/generic and spill/stack atomics in the :ref:`address processor <desc-ta>`.
|
|
unit: Instructions per Normalization Unit
|
|
vL1D Speed-of-Light:
|
|
Hit rate:
|
|
rst: The ratio of the number of vL1D cache line requests that hit [#vl1d-hit]_ in vL1D cache over the total number of cache line requests to the :ref:`vL1D Cache RAM <desc-tc>`.
|
|
unit: Percent
|
|
Bandwidth Utilization:
|
|
rst: The number of bytes looked up in the vL1D cache as a result of :ref:`VMEM <desc-vmem>` instructions, as a percent of the peak theoretical bandwidth achievable on the specific accelerator. The number of bytes is calculated as the number of cache lines requested multiplied by the cache line size. This value does not consider partial requests, so for instance, if only a single value is requested in a cache line, the data movement will still be counted as a full cache line.
|
|
unit: Percent
|
|
Utilization:
|
|
rst: Indicates how busy the :ref:`vL1D Cache RAM <desc-tc>` was during the kernel execution. The number of cycles where the vL1D Cache RAM is actively processing any request divided by the number of cycles where the vL1D is active [#vl1d-activity]_.
|
|
unit: Percent
|
|
Coalescing:
|
|
rst: Indicates how well memory instructions were coalesced by the :ref:`address processing unit <desc-ta>`, ranging from uncoalesced (25%) to fully coalesced (100%). Calculated as the average number of :ref:`thread-requests <thread-requests>` generated per instruction divided by the ideal number of thread-requests per instruction.
|
|
unit: Percent
|
|
vL1D cache stall metrics:
|
|
Stalled on L2 Data:
|
|
rst: The ratio of the number of cycles where the vL1D is stalled waiting for requested data to return from the L2 cache divided by the number of cycles where the vL1D is active.
|
|
Stalled on L2 Req:
|
|
rst: The ratio of the number of cycles where the vL1D is stalled waiting to issue a request for data to the L2 cache divided by the number of cycles where the vL1D is active.
|
|
Tag RAM Stall (Read):
|
|
rst: The ratio of the number of cycles where the vL1D is stalled due to Read requests with conflicting tags being looked up concurrently, divided by the number of cycles where the vL1D is active.
|
|
Tag RAM Stall (Write):
|
|
rst: The ratio of the number of cycles where the vL1D is stalled due to Write requests with conflicting tags being looked up concurrently, divided by the number of cycles where the vL1D is active.
|
|
Tag RAM Stall (Atomic):
|
|
rst: The ratio of the number of cycles where the vL1D is stalled due to Atomic requests with conflicting tags being looked up concurrently, divided by the number of cycles where the vL1D is active.
|
|
vL1D cache access metrics:
|
|
Total Req:
|
|
rst: The total number of incoming requests from the :ref:`address processing unit <desc-ta>` after coalescing.
|
|
unit: Requests per Normalization Unit
|
|
Read Req:
|
|
rst: The total number of incoming read requests from the :ref:`address processing unit <desc-ta>` after coalescing per :ref:`normalization unit <normalization-units>`
|
|
unit: Requests per Normalization Unit
|
|
Write Req:
|
|
rst: The total number of incoming write requests from the :ref:`address processing unit <desc-ta>` after coalescing per :ref:`normalization unit <normalization-units>`
|
|
unit: Requests per Normalization Unit
|
|
Atomic Req:
|
|
rst: The total number of incoming atomic requests from the :ref:`address processing unit <desc-ta>` after coalescing per :ref:`normalization unit <normalization-units>`
|
|
unit: Requests per Normalization Unit
|
|
Cache BW:
|
|
rst: The number of bytes looked up in the vL1D cache as a result of :ref:`VMEM <desc-vmem>` instructions divided by total duration. The number of bytes is calculated as the number of cache lines requested multiplied by the cache line size. This value does not consider partial requests, so for instance, if only a single value is requested in a cache line, the data movement will still be counted as a full cache line.
|
|
unit: Gbps
|
|
Cache Hit Rate:
|
|
rst: The ratio of the number of vL1D cache line requests that hit in vL1D cache over the total number of cache line requests to the :ref:`vL1D Cache RAM <desc-tc>`.
|
|
unit: Percent
|
|
Cache Accesses:
|
|
rst: The total number of cache line lookups in the vL1D.
|
|
unit: Requests per Normalization Unit
|
|
Cache Hits:
|
|
rst: The number of cache accesses minus the number of outgoing requests to the :doc:`L2 cache <l2-cache>`, that is, the number of cache line requests serviced by the :ref:`vL1D Cache RAM <desc-tc>` per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
Invalidations:
|
|
rst: The number of times the vL1D was issued a write-back invalidate command during the kernel's execution per :ref:`normalization unit <normalization-units>`. This may be triggered by, for instance, the ``buffer_wbinvl1`` instruction.
|
|
unit: Requests per Normalization Unit
|
|
L1-L2 BW:
|
|
rst: The number of bytes transferred across the vL1D-L2 interface as a result of :ref:`VMEM <desc-vmem>` instructions, divided by total duration. The number of bytes is calculated as the number of cache lines requested multiplied by the cache line size. This value does not consider partial requests, so for instance, if only a single value is requested in a cache line, the data movement will still be counted as a full cache line.
|
|
unit: Gbps
|
|
L1-L2 Read:
|
|
rst: The number of read requests for a vL1D cache line that were not satisfied by the vL1D and must be retrieved from the to the :doc:`L2 Cache <l2-cache>` per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
L1-L2 Write:
|
|
rst: The number of write requests to a vL1D cache line that were sent through the vL1D to the :doc:`L2 cache <l2-cache>`, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Requests per Normalization Unit
|
|
L1-L2 Atomic:
|
|
rst: The number of atomic requests that are sent through the vL1D to the :doc:`L2 cache <l2-cache>`, per :ref:`normalization unit <normalization-units>`. This includes requests for atomics with, and without return.
|
|
unit: Requests per Normalization Unit
|
|
L1 Unified Translation Cache (UTCL1):
|
|
Req:
|
|
rst: The number of translation requests made to the UTCL1 per normalization unit.
|
|
unit: Requests per Normalization Unit
|
|
Hit Ratio:
|
|
rst: The ratio of the number of translation requests that hit in the UTCL1 divided by the total number of translation requests made to the UTCL1.
|
|
unit: Percent
|
|
Hits:
|
|
rst: The number of translation requests that hit in the UTCL1, and could be reused, per normalization unit.
|
|
unit: Requests per Normalization Unit
|
|
Translation Misses:
|
|
rst: The total number of translation requests that missed in the UTCL1 due to translation not being present in the cache, per normalization unit.
|
|
unit: Requests per Normalization Unit
|
|
Permission Misses:
|
|
rst: The total number of translation requests that missed in the UTCL1 due to a permission error, per normalization unit. This is unused and expected to be zero in most configurations for modern CDNA\u2122 accelerators.
|
|
unit: Requests per Normalization Unit
|
|
L2 Speed-of-Light:
|
|
Utilization:
|
|
rst: The ratio of the :ref:`number of cycles an L2 channel was active, summed over all L2 channels on the accelerator <total-active-l2-cycles>` over the :ref:`total L2 cycles <total-l2-cycles>`.
|
|
unit: Percent
|
|
Peak Bandwidth:
|
|
rst: The number of bytes looked up in the L2 cache, as a percent of the peak theoretical bandwidth achievable on the specific accelerator. The number of bytes is calculated as the number of cache lines requested multiplied by the cache line size. This value does not consider partial requests, so e.g., if only a single value is requested in a cache line, the data movement will still be counted as a full cache line.
|
|
unit: Percent
|
|
Hit Rate:
|
|
rst: The ratio of the number of L2 cache line requests that hit in the L2 cache over the total number of incoming cache line requests to the L2 cache.
|
|
unit: Percent
|
|
L2-Fabric Read BW:
|
|
rst: The number of bytes read by the L2 over the :ref:`Infinity Fabric interface <l2-fabric>` per unit time.
|
|
unit: GB/s
|
|
L2-Fabric Write and Atomic BW:
|
|
rst: The number of bytes sent by the L2 over the :ref:`Infinity Fabric interface <l2-fabric>` by write and atomic operations per unit time.
|
|
unit: GB/s
|
|
HBM Bandwidth:
|
|
rst: Maximum theoretical bandwidth of the accelerator's local high-bandwidth memory (HBM) per unit time. This value is calculated as the number of HBM channels multiplied by the HBM channel width multiplied by the HBM clock frequency.
|
|
unit: GB/s
|
|
L2-Fabric interface metrics:
|
|
Read BW:
|
|
rst: The total number of bytes read by the L2 cache from Infinity Fabric divided by total duration.
|
|
unit: Gbps
|
|
HBM Read Traffic:
|
|
rst: The percent of read requests generated by the L2 cache that are routed to the accelerator's local high-bandwidth memory (HBM). This breakdown does not consider the *size* of the request (meaning that 32B and 64B requests are both counted as a single request), so this metric only *approximates* the percent of the L2-Fabric Read bandwidth directed to the local HBM.
|
|
unit: Percent
|
|
Remote Read Traffic:
|
|
rst: The percent of read requests generated by the L2 cache that are routed to any memory location other than the accelerator's local high-bandwidth memory (HBM) -- for example, the CPU's DRAM or a remote accelerator's HBM. This breakdown does not consider the *size* of the request (meaning that 32B and 64B requests are both counted as a single request), so this metric only *approximates* the percent of the L2-Fabric Read bandwidth directed to a remote location.
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|
unit: Percent
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|
Uncached Read Traffic:
|
|
rst: The percent of read requests generated by the L2 cache that are reading from an :ref:`uncached memory allocation <memory-type>`. Note, as described in the :ref:`request flow <l2-request-flow>` section, a single 64B read request is typically counted as two uncached read requests. So, it is possible for the Uncached Read Traffic to reach up to 200% of the total number of read requests. This breakdown does not consider the *size* of the request (i.e., 32B and 64B requests are both counted as a single request), so this metric only *approximates* the percent of the L2-Fabric read bandwidth directed to an uncached memory location.
|
|
unit: Percent
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|
Write and Atomic BW:
|
|
rst: The total number of bytes written by the L2 over Infinity Fabric by write and atomic operations divided by total duration. Note that on current CDNA accelerators, such as the :ref:`MI2XX <mixxx-note>`, requests are only considered *atomic* by Infinity Fabric if they are targeted at non-write-cacheable memory, for example, :ref:`fine-grained memory <memory-type>` allocations or :ref:`uncached memory <memory-type>` allocations on the MI2XX.
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|
unit: Gbps
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|
HBM Write and Atomic Traffic:
|
|
rst: The percent of write and atomic requests generated by the L2 cache that are routed to the accelerator's local high-bandwidth memory (HBM). This breakdown does not consider the *size* of the request (meaning that 32B and 64B requests are both counted as a single request), so this metric only *approximates* the percent of the L2-Fabric Write and Atomic bandwidth directed to the local HBM. Note that on current CDNA accelerators, such as the :ref:`MI2XX <mixxx-note>`, requests are only considered *atomic* by Infinity Fabric if they are targeted at :ref:`fine-grained memory <memory-type>` allocations or :ref:`uncached memory <memory-type>` allocations.
|
|
unit: Percent
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|
Remote Write and Atomic Traffic:
|
|
rst: The percent of read requests generated by the L2 cache that are routed to any memory location other than the accelerator's local high-bandwidth memory (HBM) -- for example, the CPU's DRAM or a remote accelerator's HBM. This breakdown does not consider the *size* of the request (meaning that 32B and 64B requests are both counted as a single request), so this metric only *approximates* the percent of the L2-Fabric Read bandwidth directed to a remote location. Note that on current CDNA accelerators, such as the :ref:`MI2XX <mixxx-note>`, requests are only considered *atomic* by Infinity Fabric if they are targeted at :ref:`fine-grained memory <memory-type>` allocations or :ref:`uncached memory <memory-type>` allocations.
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unit: Percent
|
|
Atomic Traffic:
|
|
rst: The percent of write requests generated by the L2 cache that are atomic requests to *any* memory location. This breakdown does not consider the *size* of the request (meaning that 32B and 64B requests are both counted as a single request), so this metric only *approximates* the percent of the L2-Fabric Read bandwidth directed to a remote location. Note that on current CDNA accelerators, such as the :ref:`MI2XX <mixxx-note>`, requests are only considered *atomic* by Infinity Fabric if they are targeted at :ref:`fine-grained memory <memory-type>` allocations or :ref:`uncached memory <memory-type>` allocations.
|
|
unit: Percent
|
|
Uncached Write and Atomic Traffic:
|
|
rst: The percent of write and atomic requests generated by the L2 cache that are targeting :ref:`uncached memory allocations <memory-type>`. This breakdown does not consider the *size* of the request (meaning that 32B and 64B requests are both counted as a single request), so this metric only *approximates* the percent of the L2-Fabric read bandwidth directed to uncached memory allocations.
|
|
unit: Percent
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|
Read Latency:
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|
rst: The time-averaged number of cycles read requests spent in Infinity Fabric before data was returned to the L2.
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unit: Cycles
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|
Write and Atomic Latency:
|
|
rst: The time-averaged number of cycles write requests spent in Infinity Fabric before a completion acknowledgement was returned to the L2.
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|
unit: Cycles
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|
Atomic Latency:
|
|
rst: The time-averaged number of cycles atomic requests spent in Infinity Fabric before a completion acknowledgement (atomic without return value) or data (atomic with return value) was returned to the L2.
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unit: Cycles
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|
L2 cache accesses:
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|
Bandwidth:
|
|
rst: The number of bytes looked up in the L2 cache, divided by total duration. The number of bytes is calculated as the number of cache lines requested multiplied by the cache line size. This value does not consider partial requests, so for example, if only a single value is requested in a cache line, the data movement will still be counted as a full cache line.
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unit: Gbps
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|
Req:
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|
rst: The total number of incoming requests to the L2 from all clients for all request types, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Req per Normalization Unit
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|
Read Req:
|
|
rst: The total number of read requests to the L2 from all clients.
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|
unit: Req per Normalization Unit
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|
Write Req:
|
|
rst: The total number of write requests to the L2 from all clients.
|
|
unit: Req per Normalization Unit
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|
Atomic Req:
|
|
rst: The total number of atomic requests (with and without return) to the L2 from all clients.
|
|
unit: Req per Normalization Unit
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|
Streaming Req:
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|
rst: The total number of incoming requests to the L2 that are marked as *streaming*. The exact meaning of this may differ depending on the targeted accelerator, however on an :ref:`MI2XX <mixxx-note>` this corresponds to `non-temporal load or stores <https://clang.llvm.org/docs/LanguageExtensions.html#non-temporal-load-store-builtins>`_. The L2 cache attempts to evict *streaming* requests before normal requests when the L2 is at capacity.
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unit: Req per Normalization Unit
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|
Probe Req:
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|
rst: The number of coherence probe requests made to the L2 cache from outside the accelerator. On an :ref:`MI2XX <mixxx-note>`, probe requests may be generated by, for example, writes to :ref:`fine-grained device <memory-type>` memory or by writes to :ref:`coarse-grained <memory-type>` device memory.
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|
unit: Req per Normalization Unit
|
|
Cache Hit:
|
|
rst: The ratio of the number of L2 cache line requests that hit in the L2 cache over the total number of incoming cache line requests to the L2 cache.
|
|
unit: Percent
|
|
Hits:
|
|
rst: The total number of requests to the L2 from all clients that hit in the cache. As noted in the :ref:`Speed-of-Light <l2-sol>` section, this includes hit-on-miss requests.
|
|
unit: Hits per Normalization Unit
|
|
Misses:
|
|
rst: The total number of requests to the L2 from all clients that miss in the cache. As noted in the :ref:`Speed-of-Light <l2-sol>` section, these do not include hit-on-miss requests.
|
|
unit: Misses per Normalization Unit
|
|
Writeback:
|
|
rst: The total number of L2 cache lines written back to memory for any reason. Write-backs may occur due to user code (such as HIP kernel calls to ``__threadfence_system`` or atomic built-ins) by the :doc:`command processor <command-processor>`'s memory acquire/release fences, or for other internal hardware reasons.
|
|
unit: Cachelines per Normalization Unit
|
|
Writeback (Internal):
|
|
rst: The total number of L2 cache lines written back to memory for internal hardware reasons, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cachelines per Normalization Unit
|
|
Writeback (vL1D Req):
|
|
rst: The total number of L2 cache lines written back to memory due to requests initiated by the :doc:`vL1D cache <vector-l1-cache>`, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cachelines per Normalization Unit
|
|
Evict (Internal):
|
|
rst: The total number of L2 cache lines evicted from the cache due to capacity limits, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cachelines per Normalization Unit
|
|
Evict (vL1D Req):
|
|
rst: The total number of L2 cache lines evicted from the cache due to invalidation requests initiated by the :doc:`vL1D cache <vector-l1-cache>`, per :ref:`normalization unit <normalization-units>`.
|
|
unit: Cachelines per Normalization Unit
|
|
NC Req:
|
|
rst: The total number of requests to the L2 to Not-hardware-Coherent (NC) memory allocations, per :ref:`normalization unit <normalization-units>`. See the :ref:`memory-type` for more information.
|
|
unit: Req per Normalization Unit
|
|
UC Req:
|
|
rst: The total number of requests to the L2 that go to Uncached (UC) memory allocations. See the :ref:`memory-type` for more information.
|
|
unit: Req per Normalization Unit
|
|
CC Req:
|
|
rst: The total number of requests to the L2 that go to Coherently Cacheable (CC) memory allocations. See the :ref:`memory-type` for more information.
|
|
unit: Req per Normalization Unit
|
|
RW Req:
|
|
rst: The total number of requests to the L2 that go to Read-Write coherent memory (RW) allocations. See the :ref:`memory-type` for more information.
|
|
unit: Req per Normalization Unit
|
|
L2 - Fabric Interface stalls:
|
|
Write - Credit Starvation:
|
|
rst: The number of cycles the L2-Fabric interface was stalled on write or atomic requests to any memory location because too many write/atomic requests were currently in flight, as a percent of the :ref:`total active L2 cycles <total-active-l2-cycles>`.
|
|
unit: Percent
|
|
L2 - Fabric interface detailed metrics:
|
|
Read (32B):
|
|
rst: The total number of L2 requests to Infinity Fabric to read 32B of data from any memory location, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail. Typically unused on CDNA accelerators.
|
|
unit: Req per Normalization Unit
|
|
Read (64B):
|
|
rst: The total number of L2 requests to Infinity Fabric to read 64B of data from any memory location, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail.
|
|
unit: Req per Normalization Unit
|
|
Read (128B):
|
|
rst: The total number of L2 requests to Infinity Fabric to read 128B of data from any memory location, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail.
|
|
unit: Req per Normalization Unit
|
|
Read (Uncached):
|
|
rst: The total number of L2 requests to Infinity Fabric to read :ref:`uncached data <memory-type>` from any memory location, per :ref:`normalization unit <normalization-units>`. 64B requests for uncached data are counted as two 32B uncached data requests. See :ref:`l2-request-flow` for more detail.
|
|
unit: Req per Normalization Unit
|
|
HBM Read:
|
|
rst: The total number of L2 requests to Infinity Fabric to read 32B or 64B of data from the accelerator's local HBM, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail.
|
|
unit: Req per Normalization Unit
|
|
Remote Read:
|
|
rst: The total number of L2 requests to Infinity Fabric to read 32B or 64B of data from any source other than the accelerator's local HBM, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail.
|
|
unit: Req per Normalization Unit
|
|
Write and Atomic (32B):
|
|
rst: The total number of L2 requests to Infinity Fabric to write or atomically update 32B of data to any memory location, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail.
|
|
unit: Req per Normalization Unit
|
|
Write and Atomic (Uncached):
|
|
rst: The total number of L2 requests to Infinity Fabric to write or atomically update 32B or 64B of :ref:`uncached data <memory-type>`, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail.
|
|
unit: Req per Normalization Unit
|
|
Write and Atomic (64B):
|
|
rst: The total number of L2 requests to Infinity Fabric to write or atomically update 64B of data in any memory location, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail.
|
|
unit: Req per Normalization Unit
|
|
HBM Write and Atomic:
|
|
rst: The total number of L2 requests to Infinity Fabric to write or atomically update 32B or 64B of data in the accelerator's local HBM, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail. plain
|
|
unit: Req per Normalization Unit
|
|
Remote Write and Atomic:
|
|
rst: The total number of L2 requests to Infinity Fabric to write or atomically update 32B or 64B of data in any memory location other than the accelerator's local HBM, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail.
|
|
unit: Req per Normalization Unit
|
|
Atomic:
|
|
rst: The total number of L2 requests to Infinity Fabric to atomically update 32B or 64B of data in any memory location, per :ref:`normalization unit <normalization-units>`. See :ref:`l2-request-flow` for more detail. Note that on current CDNA accelerators, such as the :ref:`MI2XX <mixxx-note>`, requests are only considered *atomic* by Infinity Fabric if they are targeted at non-write-cacheable memory, such as :ref:`fine-grained memory <memory-type>` allocations or :ref:`uncached memory <memory-type>` allocations on the MI2XX.
|
|
unit: Req per Normalization Unit
|