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114 lines
5.8 KiB
ReStructuredText
114 lines
5.8 KiB
ReStructuredText
.. _valu-arith-instruction-mix-ex:
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VALU arithmetic instruction mix
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===============================
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For this example, consider the
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:dev-sample:`instruction mix sample <instmix.hip>` distributed as a part
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of ROCm Compute Profiler.
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.. note::
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The examples in the section are expected to work on all CDNA™ accelerators.
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However, the actual experiment results in this section were collected on an
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:ref:`MI2XX <mixxx-note>` accelerator.
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.. _valu-experiment-design:
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Design note
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-----------
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This code uses a number of inline assembly instructions to cleanly
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identify the types of instructions being issued, as well as to avoid
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optimization / dead-code elimination by the compiler. While inline
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assembly is inherently not portable, this example is expected to work on
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all GCN™ GPUs and CDNA accelerators.
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We reproduce a sample of the kernel as follows:
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.. code-block:: cpp
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// fp32: add, mul, transcendental and fma
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float f1, f2;
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asm volatile(
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"v_add_f32_e32 %0, %1, %0\n"
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"v_mul_f32_e32 %0, %1, %0\n"
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"v_sqrt_f32 %0, %1\n"
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"v_fma_f32 %0, %1, %0, %1\n"
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: "=v"(f1)
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: "v"(f2));
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These instructions correspond to:
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* A 32-bit floating point addition,
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* a 32-bit floating point multiplication,
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* a 32-bit floating point square-root transcendental operation, and
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* a 32-bit floating point fused multiply-add operation.
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For more detail, refer to the `CDNA2 ISA
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Guide <https://www.amd.com/system/files/TechDocs/instinct-mi200-cdna2-instruction-set-architecture.pdf>`__.
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Instruction mix
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^^^^^^^^^^^^^^^
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This example was compiled and run on a MI250 accelerator using ROCm
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v5.6.0, and ROCm Compute Profiler v2.0.0.
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.. code-block:: shell
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$ hipcc -O3 instmix.hip -o instmix
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Generate the profile for this example using the following command.
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.. code-block:: shell
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$ rocprof-compute profile -n instmix --no-roof -- ./instmix
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Analyze the instruction mix section.
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.. code-block:: shell
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$ rocprof-compute analyze -p workloads/instmix/mi200/ -b 10.2
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<...>
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10. Compute Units - Instruction Mix
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10.2 VALU Arithmetic Instr Mix
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╒═════════╤════════════╤═════════╤════════════════╕
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│ Index │ Metric │ Count │ Unit │
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╞═════════╪════════════╪═════════╪════════════════╡
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│ 10.2.0 │ INT32 │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.1 │ INT64 │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.2 │ F16-ADD │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.3 │ F16-MUL │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.4 │ F16-FMA │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.5 │ F16-Trans │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.6 │ F32-ADD │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.7 │ F32-MUL │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.8 │ F32-FMA │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.9 │ F32-Trans │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.10 │ F64-ADD │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.11 │ F64-MUL │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.12 │ F64-FMA │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.13 │ F64-Trans │ 1.00 │ Instr per wave │
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├─────────┼────────────┼─────────┼────────────────┤
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│ 10.2.14 │ Conversion │ 1.00 │ Instr per wave │
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╘═════════╧════════════╧═════════╧════════════════╛
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This shows that we have exactly one of each type of VALU arithmetic instruction
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by construction.
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