derek.holloway
7502bf64a4
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191 lines
8.3 KiB
C++
191 lines
8.3 KiB
C++
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++17 -fclangir -emit-cir -mmlir -mlir-print-ir-before=cir-cxxabi-lowering %s -o %t.cir 2> %t-before.cir
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// RUN: FileCheck --check-prefix=CIR-BEFORE --input-file=%t-before.cir %s
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// RUN: FileCheck --check-prefix=CIR-AFTER --input-file=%t.cir %s
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++17 -fclangir -emit-llvm %s -o %t-cir.ll
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// RUN: FileCheck --input-file=%t-cir.ll --check-prefix=LLVM %s
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++17 -emit-llvm %s -o %t.ll
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// RUN: FileCheck --input-file=%t.ll --check-prefix=OGCG %s
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struct Base1 {
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int base1_data;
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};
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struct Base2 {
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int base2_data;
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};
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struct Derived : Base1, Base2 {
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int derived_data;
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};
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auto base_to_derived(int Base2::*ptr) -> int Derived::* {
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return ptr;
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z15base_to_derivedM5Base2i
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// CIR-BEFORE: %[[PTR:.*]] = cir.load{{.*}} %{{.*}}
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// CIR-BEFORE: %[[RET:.*]] = cir.derived_data_member %[[PTR]][4] : !cir.data_member<!s32i in !rec_Base2> -> !cir.data_member<!s32i in !rec_Derived>
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// CIR-AFTER: cir.func {{.*}} @_Z15base_to_derivedM5Base2i
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// CIR-AFTER: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!s64i>, !s64i
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// CIR-AFTER: %[[NULL_VALUE:.*]] = cir.const #cir.int<-1> : !s64i
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// CIR-AFTER: %[[IS_NULL:.*]] = cir.cmp eq %[[PTR]], %[[NULL_VALUE]]
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// CIR-AFTER: %[[OFFSET_VALUE:.*]] = cir.const #cir.int<4> : !s64i
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// CIR-AFTER: %[[BINOP_KIND:.*]] = cir.add nsw %[[PTR]], %[[OFFSET_VALUE]] : !s64i
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// CIR-AFTER: %[[SELECT:.*]] = cir.select if %[[IS_NULL]] then %[[PTR]] else %[[BINOP_KIND]]
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// LLVM: define {{.*}} i64 @_Z15base_to_derivedM5Base2i
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// LLVM: %[[PTR:.*]] = load i64, ptr %{{.*}}
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// LLVM: %[[IS_NULL:.*]] = icmp eq i64 %[[PTR]], -1
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// LLVM: %[[DERIVED:.*]] = add nsw i64 %[[PTR]], 4
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// LLVM: %[[RET:.*]] = select i1 %[[IS_NULL]], i64 %[[PTR]], i64 %[[DERIVED]]
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// OGCG: define {{.*}} i64 @_Z15base_to_derivedM5Base2i
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// OGCG: %[[PTR:.*]] = load i64, ptr %{{.*}}
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// OGCG: %[[DERIVED:.*]] = add nsw i64 %[[PTR]], 4
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// OGCG: %[[IS_NULL:.*]] = icmp eq i64 %[[PTR]], -1
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// OGCG: %[[RET:.*]] = select i1 %[[IS_NULL]], i64 %[[PTR]], i64 %[[DERIVED]]
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auto derived_to_base(int Derived::*ptr) -> int Base2::* {
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return static_cast<int Base2::*>(ptr);
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z15derived_to_baseM7Derivedi
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// CIR-BEFORE: %[[PTR:.*]] = cir.load{{.*}} %{{.*}}
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// CIR-BEFORE: %[[RET:.*]] = cir.base_data_member %[[PTR]][4] : !cir.data_member<!s32i in !rec_Derived> -> !cir.data_member<!s32i in !rec_Base2>
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// CIR-AFTER: cir.func {{.*}} @_Z15derived_to_baseM7Derivedi
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// CIR-AFTER: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!s64i>, !s64i
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// CIR-AFTER: %[[NULL_VALUE:.*]] = cir.const #cir.int<-1> : !s64i
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// CIR-AFTER: %[[IS_NULL:.*]] = cir.cmp eq %[[PTR]], %[[NULL_VALUE]]
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// CIR-AFTER: %[[OFFSET_VALUE:.*]] = cir.const #cir.int<4> : !s64i
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// CIR-AFTER: %[[BINOP_KIND:.*]] = cir.sub nsw %[[PTR]], %[[OFFSET_VALUE]] : !s64i
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// CIR-AFTER: %[[SELECT:.*]] = cir.select if %[[IS_NULL]] then %[[PTR]] else %[[BINOP_KIND]]
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// LLVM: define {{.*}} i64 @_Z15derived_to_baseM7Derivedi
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// LLVM: %[[PTR:.*]] = load i64, ptr %{{.*}}
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// LLVM: %[[IS_NULL:.*]] = icmp eq i64 %[[PTR]], -1
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// LLVM: %[[BASE:.*]] = sub nsw i64 %[[PTR]], 4
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// LLVM: %[[RET:.*]] = select i1 %[[IS_NULL]], i64 %[[PTR]], i64 %[[BASE]]
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// OGCG: define {{.*}} i64 @_Z15derived_to_baseM7Derivedi
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// OGCG: %[[PTR:.*]] = load i64, ptr %{{.*}}
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// OGCG: %[[BASE:.*]] = sub nsw i64 %[[PTR]], 4
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// OGCG: %[[IS_NULL:.*]] = icmp eq i64 %[[PTR]], -1
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// OGCG: %[[RET:.*]] = select i1 %[[IS_NULL]], i64 %[[PTR]], i64 %[[BASE]]
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auto base_to_derived_zero_offset(int Base1::*ptr) -> int Derived::* {
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return ptr;
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z27base_to_derived_zero_offsetM5Base1i
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// CIR-BEFORE: %[[PTR:.*]] = cir.load{{.*}} %{{.*}}
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// CIR-BEFORE: %[[RET:.*]] = cir.derived_data_member %[[PTR]][0] : !cir.data_member<!s32i in !rec_Base1> -> !cir.data_member<!s32i in !rec_Derived>
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// CIR-AFTER: cir.func {{.*}} @_Z27base_to_derived_zero_offsetM5Base1i
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// CIR-AFTER: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!s64i>, !s64i
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// CIR-AFTER: cir.store %[[PTR]], %{{.*}} : !s64i, !cir.ptr<!s64i>
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// No LLVM instructions emitted for performing a zero-offset cast.
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// LLVM: define {{.*}} i64 @_Z27base_to_derived_zero_offsetM5Base1i
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// LLVM-NEXT: %[[PTR_ADDR:.*]] = alloca i64
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// LLVM-NEXT: %[[RETVAL:.*]] = alloca i64
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// LLVM-NEXT: store i64 %{{.*}}, ptr %[[PTR_ADDR]]
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// LLVM-NEXT: %[[TEMP:.*]] = load i64, ptr %[[PTR_ADDR]]
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// LLVM-NEXT: store i64 %[[TEMP]], ptr %[[RETVAL]]
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// LLVM-NEXT: %[[RET:.*]] = load i64, ptr %[[RETVAL]]
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// LLVM-NEXT: ret i64 %[[RET]]
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// OGCG: define {{.*}} i64 @_Z27base_to_derived_zero_offsetM5Base1i
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// OGCG-NEXT: entry:
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// OGCG-NEXT: %[[PTR_ADDR:.*]] = alloca i64
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// OGCG-NEXT: store i64 %{{.*}}, ptr %[[PTR_ADDR]]
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// OGCG-NEXT: %[[RET:.*]] = load i64, ptr %[[PTR_ADDR]]
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// OGCG-NEXT: ret i64 %[[RET]]
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auto derived_to_base_zero_offset(int Derived::*ptr) -> int Base1::* {
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return static_cast<int Base1::*>(ptr);
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z27derived_to_base_zero_offsetM7Derivedi
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// CIR-BEFORE: %[[PTR:.*]] = cir.load{{.*}} %{{.*}}
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// CIR-BEFORE: %[[RET:.*]] = cir.base_data_member %[[PTR]][0] : !cir.data_member<!s32i in !rec_Derived> -> !cir.data_member<!s32i in !rec_Base1>
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// CIR-AFTER: cir.func {{.*}} @_Z27derived_to_base_zero_offsetM7Derivedi
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// CIR-AFTER: %[[PTR:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!s64i>, !s64i
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// CIR-AFTER: cir.store %[[PTR]], %{{.*}} : !s64i, !cir.ptr<!s64i>
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// No LLVM instructions emitted for performing a zero-offset cast.
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// LLVM: define {{.*}} i64 @_Z27derived_to_base_zero_offsetM7Derivedi
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// LLVM-NEXT: %[[PTR_ADDR:.*]] = alloca i64
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// LLVM-NEXT: %[[RETVAL:.*]] = alloca i64
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// LLVM-NEXT: store i64 %{{.*}}, ptr %[[PTR_ADDR]]
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// LLVM-NEXT: %[[TEMP:.*]] = load i64, ptr %[[PTR_ADDR]]
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// LLVM-NEXT: store i64 %[[TEMP]], ptr %[[RETVAL]]
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// LLVM-NEXT: %[[RET:.*]] = load i64, ptr %[[RETVAL]]
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// LLVM-NEXT: ret i64 %[[RET]]
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// OGCG: define {{.*}} i64 @_Z27derived_to_base_zero_offsetM7Derivedi
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// OGCG-NEXT: entry:
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// OGCG-NEXT: %[[PTR_ADDR:.*]] = alloca i64
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// OGCG-NEXT: store i64 %{{.*}}, ptr %[[PTR_ADDR]]
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// OGCG-NEXT: %[[RET:.*]] = load i64, ptr %[[PTR_ADDR]]
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// OGCG-NEXT: ret i64 %[[RET]]
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struct Foo {
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int a;
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};
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struct Bar {
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int a;
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};
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bool to_bool(int Foo::*x) {
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return x;
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z7to_boolM3Fooi
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// CIR-BEFORE: %[[X:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!cir.data_member<!s32i in !rec_Foo>>, !cir.data_member<!s32i in !rec_Foo>
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// CIR-BEFORE: %{{.*}} = cir.cast member_ptr_to_bool %[[X]] : !cir.data_member<!s32i in !rec_Foo> -> !cir.bool
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// CIR-AFTER: cir.func {{.*}} @_Z7to_boolM3Fooi
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// CIR-AFTER: %[[NULL_VAL:.*]] = cir.const #cir.int<-1> : !s64i
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// CIR-AFTER: %[[BOOL_VAL:.*]] = cir.cmp ne %{{.*}}, %[[NULL_VAL]] : !s64i
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// LLVM: define {{.*}} i1 @_Z7to_boolM3Fooi
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// LLVM: %[[X:.*]] = load i64, ptr %{{.*}}
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// LLVM: %[[IS_NULL:.*]] = icmp ne i64 %[[X]], -1
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// OGCG: define {{.*}} i1 @_Z7to_boolM3Fooi
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// OGCG: %[[X:.*]] = load i64, ptr %{{.*}}
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// OGCG: %[[IS_NULL:.*]] = icmp ne i64 %[[X]], -1
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auto bitcast(int Foo::*x) {
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return reinterpret_cast<int Bar::*>(x);
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}
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// CIR-BEFORE: cir.func {{.*}} @_Z7bitcastM3Fooi
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// CIR-BEFORE: %[[X:.*]] = cir.load{{.*}} %{{.*}} : !cir.ptr<!cir.data_member<!s32i in !rec_Foo>>, !cir.data_member<!s32i in !rec_Foo>
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// CIR-BEFORE: %{{.*}} = cir.cast bitcast %[[X]] : !cir.data_member<!s32i in !rec_Foo> -> !cir.data_member<!s32i in !rec_Bar>
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// CIR-AFTER: cir.func {{.*}} @_Z7bitcastM3Fooi(%[[ARG0:.*]]: !s64i
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// CIR-AFTER: %[[X_ADDR:.*]] = cir.alloca !s64i, !cir.ptr<!s64i>, ["x", init] {alignment = 8 : i64}
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// CIR-AFTER: %[[RET_ADDR:.*]] = cir.alloca !s64i, !cir.ptr<!s64i>, ["__retval"] {alignment = 8 : i64}
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// CIR-AFTER: cir.store %[[ARG0]], %[[X_ADDR]]
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// CIR-AFTER: %[[X:.*]] = cir.load{{.*}} %[[X_ADDR]]
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// CIR-AFTER: cir.store %[[X]], %[[RET_ADDR]]
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// CIR-AFTER: %[[RET:.*]] = cir.load %[[RET_ADDR]]
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// CIR-AFTER: cir.return %[[RET]] : !s64i
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// LLVM: define {{.*}} i64 @_Z7bitcastM3Fooi
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// LLVM: %[[X:.*]] = load i64, ptr %{{.*}}
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// LLVM: store i64 %[[X]], ptr %[[RET_ADDR:.*]]
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// LLVM: %[[RET:.*]] = load i64, ptr %[[RET_ADDR:.*]]
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// LLVM: ret i64 %[[RET]]
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// OGCG: define {{.*}} i64 @_Z7bitcastM3Fooi
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// OGCG: %[[X:.*]] = load i64, ptr %{{.*}}
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// OGCG: ret i64 %[[X]]
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