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649 lines
22 KiB
C++
649 lines
22 KiB
C++
//===- ADCE.cpp - Code to perform dead code elimination -------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Aggressive Dead Code Elimination pass. This pass
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// optimistically assumes that all instructions are dead until proven otherwise,
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// allowing it to eliminate dead computations that other DCE passes do not
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// catch, particularly involving loop computations.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Scalar/ADCE.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/DepthFirstIterator.h"
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#include "llvm/ADT/GraphTraits.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/CFG.h"
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#include "llvm/Analysis/DomTreeUpdater.h"
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#include "llvm/Analysis/GlobalsModRef.h"
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#include "llvm/Analysis/IteratedDominanceFrontier.h"
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#include "llvm/Analysis/MemorySSA.h"
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#include "llvm/Analysis/PostDominators.h"
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#include "llvm/IR/BasicBlock.h"
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#include "llvm/IR/CFG.h"
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#include "llvm/IR/DebugInfo.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/IR/DebugLoc.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/InstIterator.h"
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/PassManager.h"
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#include "llvm/IR/Use.h"
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#include "llvm/IR/Value.h"
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#include "llvm/ProfileData/InstrProf.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Transforms/Utils/Local.h"
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#include <cassert>
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#include <cstddef>
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#include <utility>
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using namespace llvm;
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#define DEBUG_TYPE "adce"
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STATISTIC(NumRemoved, "Number of instructions removed");
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STATISTIC(NumBranchesRemoved, "Number of branch instructions removed");
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// This is a temporary option until we change the interface to this pass based
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// on optimization level.
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static cl::opt<bool> RemoveControlFlowFlag("adce-remove-control-flow",
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cl::init(true), cl::Hidden);
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// This option enables removing of may-be-infinite loops which have no other
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// effect.
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static cl::opt<bool> RemoveLoops("adce-remove-loops", cl::init(false),
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cl::Hidden);
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namespace {
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/// Information about basic blocks relevant to dead code elimination.
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struct BlockInfoType {
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/// True when this block contains a live instructions.
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bool Live = false;
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/// True when this block is known to have live PHI nodes.
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bool HasLivePhiNodes = false;
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/// Control dependence sources need to be live for this block.
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bool CFLive = false;
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/// Post-order numbering of reverse control flow graph.
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unsigned PostOrder = 0;
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};
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struct ADCEChanged {
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bool ChangedAnything = false;
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bool ChangedNonDebugInstr = false;
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bool ChangedControlFlow = false;
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};
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class AggressiveDeadCodeElimination {
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Function &F;
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// ADCE does not use DominatorTree per se, but it updates it to preserve the
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// analysis.
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DominatorTree *DT;
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PostDominatorTree &PDT;
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/// Mapping of blocks to associated information, indexed by block number.
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SmallVector<BlockInfoType> BlockInfo;
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/// Set of live instructions.
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SmallPtrSet<Instruction *, 32> LiveInst;
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bool isLive(Instruction *I) { return LiveInst.contains(I); }
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/// Instructions known to be live where we need to mark
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/// reaching definitions as live.
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SmallVector<Instruction *, 128> Worklist;
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/// Debug info scopes around a live instruction.
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SmallPtrSet<const Metadata *, 32> AliveScopes;
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/// Set of blocks with not known to have live terminators.
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SmallSetVector<BasicBlock *, 16> BlocksWithDeadTerminators;
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/// The set of blocks which we have determined whose control
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/// dependence sources must be live and which have not had
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/// those dependences analyzed.
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SmallPtrSet<BasicBlock *, 16> NewLiveBlocks;
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/// Set up auxiliary data structures for Instructions and BasicBlocks and
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/// initialize the Worklist to the set of must-be-live Instruscions.
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void initialize();
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BlockInfoType &getBlockInfo(BasicBlock *BB) {
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return BlockInfo[BB->getNumber()];
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}
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/// Return true for operations which are always treated as live.
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bool isAlwaysLive(Instruction &I);
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/// Return true for instrumentation instructions for value profiling.
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bool isInstrumentsConstant(Instruction &I);
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/// Propagate liveness to reaching definitions.
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void markLiveInstructions();
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/// Mark an instruction as live.
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void markLive(Instruction *I);
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/// Mark a block as live.
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void markLive(BasicBlock *BB);
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/// Mark terminators of control predecessors of a PHI node live.
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void markPhiLive(PHINode *PN);
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/// Record the Debug Scopes which surround live debug information.
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void collectLiveScopes(const DILocalScope &LS);
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void collectLiveScopes(const DILocation &DL);
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/// Analyze dead branches to find those whose branches are the sources
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/// of control dependences impacting a live block. Those branches are
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/// marked live.
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void markLiveBranchesFromControlDependences();
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/// Remove instructions not marked live, return if any instruction was
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/// removed.
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ADCEChanged removeDeadInstructions();
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/// Identify connected sections of the control flow graph which have
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/// dead terminators and rewrite the control flow graph to remove them.
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bool updateDeadRegions();
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/// Set the BlockInfo::PostOrder field based on a post-order
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/// numbering of the reverse control flow graph.
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void computeReversePostOrder();
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/// Make the terminator of this block an unconditional branch to \p Target.
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void makeUnconditional(BasicBlock *BB, BasicBlock *Target);
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public:
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AggressiveDeadCodeElimination(Function &F, DominatorTree *DT,
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PostDominatorTree &PDT)
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: F(F), DT(DT), PDT(PDT) {}
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ADCEChanged performDeadCodeElimination();
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};
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} // end anonymous namespace
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ADCEChanged AggressiveDeadCodeElimination::performDeadCodeElimination() {
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initialize();
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markLiveInstructions();
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return removeDeadInstructions();
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}
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void AggressiveDeadCodeElimination::initialize() {
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BlockInfo.resize(F.getMaxBlockNumber());
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size_t NumInsts = 0;
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for (auto &BB : F)
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NumInsts += BB.size();
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LiveInst.reserve(NumInsts);
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// Collect the set of "root" instructions that are known live.
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for (Instruction &I : instructions(F))
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if (isAlwaysLive(I))
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markLive(&I);
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if (!RemoveControlFlowFlag)
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return;
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if (!RemoveLoops) {
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// Mark all terminators that have backedges as live.
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SmallVector<std::pair<const BasicBlock *, const BasicBlock *>> Backedges;
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FindFunctionBackedges(F, Backedges);
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for (const auto &[Src, Dst] : Backedges)
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markLive(const_cast<Instruction *>(Src->getTerminator()));
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}
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// Mark blocks live if there is no path from the block to a
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// return of the function.
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// We do this by seeing which of the postdomtree root children exit the
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// program, and for all others, mark the subtree live.
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for (const auto &PDTChild : children<DomTreeNode *>(PDT.getRootNode())) {
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auto *BB = PDTChild->getBlock();
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// Real function return
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if (isa<ReturnInst>(BB->back())) {
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LLVM_DEBUG(dbgs() << "post-dom root child is a return: " << BB->getName()
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<< '\n';);
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continue;
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}
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// This child is something else, like an infinite loop.
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for (auto *DFNode : depth_first(PDTChild))
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markLive(&DFNode->getBlock()->back());
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}
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// Treat the entry block as always live
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auto *BB = &F.getEntryBlock();
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auto &EntryInfo = getBlockInfo(BB);
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EntryInfo.Live = true;
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if (isa<UncondBrInst>(BB->back()))
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markLive(&BB->back());
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// Build initial collection of blocks with dead terminators
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for (auto &BB : F)
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if (!isLive(&BB.back()))
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BlocksWithDeadTerminators.insert(&BB);
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}
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bool AggressiveDeadCodeElimination::isAlwaysLive(Instruction &I) {
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// TODO -- use llvm::isInstructionTriviallyDead
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if (I.isEHPad() || I.mayHaveSideEffects()) {
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// Skip any value profile instrumentation calls if they are
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// instrumenting constants.
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if (isInstrumentsConstant(I))
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return false;
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return true;
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}
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if (!I.isTerminator())
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return false;
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if (RemoveControlFlowFlag && isa<UncondBrInst, CondBrInst, SwitchInst>(I))
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return false;
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return true;
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}
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// Check if this instruction is a runtime call for value profiling and
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// if it's instrumenting a constant.
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bool AggressiveDeadCodeElimination::isInstrumentsConstant(Instruction &I) {
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// TODO -- move this test into llvm::isInstructionTriviallyDead
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if (CallInst *CI = dyn_cast<CallInst>(&I))
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if (Function *Callee = CI->getCalledFunction())
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if (Callee->getName() == getInstrProfValueProfFuncName())
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if (isa<Constant>(CI->getArgOperand(0)))
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return true;
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return false;
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}
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void AggressiveDeadCodeElimination::markLiveInstructions() {
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// Propagate liveness backwards to operands.
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do {
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// Worklist holds newly discovered live instructions
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// where we need to mark the inputs as live.
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while (!Worklist.empty()) {
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Instruction *LiveInst = Worklist.pop_back_val();
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LLVM_DEBUG(dbgs() << "work live: "; LiveInst->dump(););
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for (Use &OI : LiveInst->operands())
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if (Instruction *Inst = dyn_cast<Instruction>(OI))
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markLive(Inst);
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if (auto *PN = dyn_cast<PHINode>(LiveInst))
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markPhiLive(PN);
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}
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// After data flow liveness has been identified, examine which branch
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// decisions are required to determine live instructions are executed.
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markLiveBranchesFromControlDependences();
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} while (!Worklist.empty());
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}
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void AggressiveDeadCodeElimination::markLive(Instruction *I) {
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auto [It, Inserted] = LiveInst.insert(I);
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if (!Inserted)
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return;
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LLVM_DEBUG(dbgs() << "mark live: "; I->dump());
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Worklist.push_back(I);
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// Collect the live debug info scopes attached to this instruction.
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if (const DILocation *DL = I->getDebugLoc())
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collectLiveScopes(*DL);
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// Mark the containing block live
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BasicBlock *BB = I->getParent();
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if (I == &BB->back()) {
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BlocksWithDeadTerminators.remove(BB);
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// For live terminators, mark destination blocks
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// live to preserve this control flow edges.
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if (!isa<UncondBrInst>(I))
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for (auto *Succ : I->successors())
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markLive(Succ);
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}
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markLive(BB);
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}
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void AggressiveDeadCodeElimination::markLive(BasicBlock *BB) {
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auto &BBInfo = BlockInfo[BB->getNumber()];
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if (BBInfo.Live)
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return;
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LLVM_DEBUG(dbgs() << "mark block live: " << BB->getName() << '\n');
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BBInfo.Live = true;
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if (!BBInfo.CFLive) {
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BBInfo.CFLive = true;
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NewLiveBlocks.insert(BB);
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}
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// Mark unconditional branches at the end of live
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// blocks as live since there is no work to do for them later
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if (isa<UncondBrInst>(BB->back()))
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markLive(&BB->back());
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}
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void AggressiveDeadCodeElimination::collectLiveScopes(const DILocalScope &LS) {
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if (!AliveScopes.insert(&LS).second)
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return;
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if (isa<DISubprogram>(LS))
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return;
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// Tail-recurse through the scope chain.
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collectLiveScopes(cast<DILocalScope>(*LS.getScope()));
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}
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void AggressiveDeadCodeElimination::collectLiveScopes(const DILocation &DL) {
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// Even though DILocations are not scopes, shove them into AliveScopes so we
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// don't revisit them.
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if (!AliveScopes.insert(&DL).second)
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return;
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// Collect live scopes from the scope chain.
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collectLiveScopes(*DL.getScope());
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// Tail-recurse through the inlined-at chain.
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if (const DILocation *IA = DL.getInlinedAt())
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collectLiveScopes(*IA);
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}
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void AggressiveDeadCodeElimination::markPhiLive(PHINode *PN) {
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auto &Info = getBlockInfo(PN->getParent());
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// Only need to check this once per block.
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if (Info.HasLivePhiNodes)
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return;
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Info.HasLivePhiNodes = true;
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// If a predecessor block is not live, mark it as control-flow live
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// which will trigger marking live branches upon which
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// that block is control dependent.
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for (auto *PredBB : predecessors(PN->getParent())) {
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auto &Info = getBlockInfo(PredBB);
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if (!Info.CFLive) {
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Info.CFLive = true;
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NewLiveBlocks.insert(PredBB);
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}
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}
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}
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void AggressiveDeadCodeElimination::markLiveBranchesFromControlDependences() {
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if (BlocksWithDeadTerminators.empty())
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return;
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LLVM_DEBUG({
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dbgs() << "new live blocks:\n";
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for (auto *BB : NewLiveBlocks)
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dbgs() << "\t" << BB->getName() << '\n';
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dbgs() << "dead terminator blocks:\n";
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for (auto *BB : BlocksWithDeadTerminators)
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dbgs() << "\t" << BB->getName() << '\n';
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});
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// The dominance frontier of a live block X in the reverse
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// control graph is the set of blocks upon which X is control
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// dependent. The following sequence computes the set of blocks
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// which currently have dead terminators that are control
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// dependence sources of a block which is in NewLiveBlocks.
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const SmallPtrSet<BasicBlock *, 16> BWDT(llvm::from_range,
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BlocksWithDeadTerminators);
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SmallVector<BasicBlock *, 32> IDFBlocks;
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ReverseIDFCalculator IDFs(PDT);
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IDFs.setDefiningBlocks(NewLiveBlocks);
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IDFs.setLiveInBlocks(BWDT);
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IDFs.calculate(IDFBlocks);
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NewLiveBlocks.clear();
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// Dead terminators which control live blocks are now marked live.
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for (auto *BB : IDFBlocks) {
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LLVM_DEBUG(dbgs() << "live control in: " << BB->getName() << '\n');
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markLive(BB->getTerminator());
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}
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}
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//===----------------------------------------------------------------------===//
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//
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// Routines to update the CFG and SSA information before removing dead code.
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//
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//===----------------------------------------------------------------------===//
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ADCEChanged AggressiveDeadCodeElimination::removeDeadInstructions() {
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ADCEChanged Changed;
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// Updates control and dataflow around dead blocks
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Changed.ChangedControlFlow = updateDeadRegions();
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LLVM_DEBUG({
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for (Instruction &I : instructions(F)) {
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// Check if the instruction is alive.
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if (isLive(&I))
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continue;
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if (auto *DII = dyn_cast<DbgVariableIntrinsic>(&I)) {
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// Check if the scope of this variable location is alive.
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if (AliveScopes.count(DII->getDebugLoc()->getScope()))
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continue;
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// If intrinsic is pointing at a live SSA value, there may be an
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// earlier optimization bug: if we know the location of the variable,
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// why isn't the scope of the location alive?
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for (Value *V : DII->location_ops()) {
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if (Instruction *II = dyn_cast<Instruction>(V)) {
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if (isLive(II)) {
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dbgs() << "Dropping debug info for " << *DII << "\n";
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break;
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}
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}
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}
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}
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}
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});
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// The inverse of the live set is the dead set. These are those instructions
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// that have no side effects and do not influence the control flow or return
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// value of the function, and may therefore be deleted safely.
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// NOTE: We reuse the Worklist vector here for memory efficiency.
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for (Instruction &I : llvm::reverse(instructions(F))) {
|
|
// With "RemoveDIs" debug-info stored in DbgVariableRecord objects,
|
|
// debug-info attached to this instruction, and drop any for scopes that
|
|
// aren't alive, like the rest of this loop does. Extending support to
|
|
// assignment tracking is future work.
|
|
for (DbgRecord &DR : make_early_inc_range(I.getDbgRecordRange())) {
|
|
// Avoid removing a DVR that is linked to instructions because it holds
|
|
// information about an existing store.
|
|
if (DbgVariableRecord *DVR = dyn_cast<DbgVariableRecord>(&DR);
|
|
DVR && DVR->isDbgAssign())
|
|
if (!at::getAssignmentInsts(DVR).empty())
|
|
continue;
|
|
if (AliveScopes.count(DR.getDebugLoc()->getScope()))
|
|
continue;
|
|
I.dropOneDbgRecord(&DR);
|
|
}
|
|
|
|
// Check if the instruction is alive.
|
|
if (isLive(&I))
|
|
continue;
|
|
|
|
Changed.ChangedNonDebugInstr = true;
|
|
|
|
// Prepare to delete.
|
|
Worklist.push_back(&I);
|
|
salvageDebugInfo(I);
|
|
}
|
|
|
|
for (Instruction *&I : Worklist)
|
|
I->dropAllReferences();
|
|
|
|
for (Instruction *&I : Worklist) {
|
|
++NumRemoved;
|
|
I->eraseFromParent();
|
|
}
|
|
|
|
Changed.ChangedAnything = Changed.ChangedControlFlow || !Worklist.empty();
|
|
|
|
return Changed;
|
|
}
|
|
|
|
// A dead region is the set of dead blocks with a common live post-dominator.
|
|
bool AggressiveDeadCodeElimination::updateDeadRegions() {
|
|
LLVM_DEBUG({
|
|
dbgs() << "final dead terminator blocks: " << '\n';
|
|
for (auto *BB : BlocksWithDeadTerminators)
|
|
dbgs() << '\t' << BB->getName()
|
|
<< (getBlockInfo(BB).Live ? " LIVE\n" : "\n");
|
|
});
|
|
|
|
// Don't compute the post ordering unless we needed it.
|
|
bool HavePostOrder = false;
|
|
bool Changed = false;
|
|
SmallVector<DominatorTree::UpdateType, 10> DeletedEdges;
|
|
|
|
for (auto *BB : BlocksWithDeadTerminators) {
|
|
if (isa<UncondBrInst>(BB->back())) {
|
|
LiveInst.insert(&BB->back());
|
|
continue;
|
|
}
|
|
|
|
if (!HavePostOrder) {
|
|
computeReversePostOrder();
|
|
HavePostOrder = true;
|
|
}
|
|
|
|
// Add an unconditional branch to the successor closest to the
|
|
// end of the function which insures a path to the exit for each
|
|
// live edge.
|
|
BasicBlock *PreferredSucc = nullptr;
|
|
unsigned PreferredSuccPostOrder = 0;
|
|
for (auto *Succ : successors(BB)) {
|
|
unsigned SuccPostOrder = BlockInfo[Succ->getNumber()].PostOrder;
|
|
if (PreferredSuccPostOrder < SuccPostOrder) {
|
|
PreferredSucc = Succ;
|
|
PreferredSuccPostOrder = SuccPostOrder;
|
|
}
|
|
}
|
|
assert((PreferredSucc && PreferredSuccPostOrder > 0) &&
|
|
"Failed to find safe successor for dead branch");
|
|
|
|
// Collect removed successors to update the (Post)DominatorTrees.
|
|
SmallPtrSet<BasicBlock *, 4> RemovedSuccessors;
|
|
bool First = true;
|
|
for (auto *Succ : successors(BB)) {
|
|
if (!First || Succ != PreferredSucc) {
|
|
Succ->removePredecessor(BB);
|
|
RemovedSuccessors.insert(Succ);
|
|
} else
|
|
First = false;
|
|
}
|
|
makeUnconditional(BB, PreferredSucc);
|
|
|
|
// Inform the dominators about the deleted CFG edges.
|
|
for (auto *Succ : RemovedSuccessors) {
|
|
// It might have happened that the same successor appeared multiple times
|
|
// and the CFG edge wasn't really removed.
|
|
if (Succ != PreferredSucc) {
|
|
LLVM_DEBUG(dbgs() << "ADCE: (Post)DomTree edge enqueued for deletion"
|
|
<< BB->getName() << " -> " << Succ->getName()
|
|
<< "\n");
|
|
DeletedEdges.push_back({DominatorTree::Delete, BB, Succ});
|
|
}
|
|
}
|
|
|
|
NumBranchesRemoved += 1;
|
|
Changed = true;
|
|
}
|
|
|
|
if (!DeletedEdges.empty())
|
|
DomTreeUpdater(DT, &PDT, DomTreeUpdater::UpdateStrategy::Eager)
|
|
.applyUpdates(DeletedEdges);
|
|
|
|
return Changed;
|
|
}
|
|
|
|
// reverse top-sort order
|
|
void AggressiveDeadCodeElimination::computeReversePostOrder() {
|
|
// This provides a post-order numbering of the reverse control flow graph
|
|
// Note that it is incomplete in the presence of infinite loops but we don't
|
|
// need numbers blocks which don't reach the end of the functions since
|
|
// all branches in those blocks are forced live.
|
|
|
|
// For each block without successors, extend the DFS from the block
|
|
// backward through the graph
|
|
SmallPtrSet<BasicBlock*, 16> Visited;
|
|
unsigned PostOrder = 0;
|
|
for (auto &BB : F) {
|
|
if (!succ_empty(&BB))
|
|
continue;
|
|
for (BasicBlock *Block : inverse_post_order_ext(&BB,Visited))
|
|
getBlockInfo(Block).PostOrder = PostOrder++;
|
|
}
|
|
}
|
|
|
|
void AggressiveDeadCodeElimination::makeUnconditional(BasicBlock *BB,
|
|
BasicBlock *Target) {
|
|
Instruction *PredTerm = BB->getTerminator();
|
|
// Collect the live debug info scopes attached to this instruction.
|
|
if (const DILocation *DL = PredTerm->getDebugLoc())
|
|
collectLiveScopes(*DL);
|
|
|
|
// Just mark live an existing unconditional branch
|
|
if (auto *BI = dyn_cast<UncondBrInst>(PredTerm)) {
|
|
BI->setSuccessor(Target);
|
|
LiveInst.insert(PredTerm);
|
|
return;
|
|
}
|
|
LLVM_DEBUG(dbgs() << "making unconditional " << BB->getName() << '\n');
|
|
NumBranchesRemoved += 1;
|
|
IRBuilder<> Builder(PredTerm);
|
|
auto *NewTerm = Builder.CreateBr(Target);
|
|
LiveInst.insert(NewTerm);
|
|
if (const DILocation *DL = PredTerm->getDebugLoc())
|
|
NewTerm->setDebugLoc(DL);
|
|
PredTerm->eraseFromParent();
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// Pass Manager integration code
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
PreservedAnalyses ADCEPass::run(Function &F, FunctionAnalysisManager &FAM) {
|
|
// ADCE does not need DominatorTree, but require DominatorTree here
|
|
// to update analysis if it is already available.
|
|
auto *DT = FAM.getCachedResult<DominatorTreeAnalysis>(F);
|
|
auto &PDT = FAM.getResult<PostDominatorTreeAnalysis>(F);
|
|
ADCEChanged Changed =
|
|
AggressiveDeadCodeElimination(F, DT, PDT).performDeadCodeElimination();
|
|
if (!Changed.ChangedAnything)
|
|
return PreservedAnalyses::all();
|
|
|
|
PreservedAnalyses PA;
|
|
if (!Changed.ChangedControlFlow) {
|
|
PA.preserveSet<CFGAnalyses>();
|
|
if (!Changed.ChangedNonDebugInstr) {
|
|
// Only removing debug instructions does not affect MemorySSA.
|
|
//
|
|
// Therefore we preserve MemorySSA when only removing debug instructions
|
|
// since otherwise later passes may behave differently which then makes
|
|
// the presence of debug info affect code generation.
|
|
PA.preserve<MemorySSAAnalysis>();
|
|
}
|
|
}
|
|
PA.preserve<DominatorTreeAnalysis>();
|
|
PA.preserve<PostDominatorTreeAnalysis>();
|
|
|
|
return PA;
|
|
}
|