derek.holloway
7502bf64a4
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59 lines
1.8 KiB
LLVM
59 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=aarch64-none-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 -verify-machineinstrs -o - %s | FileCheck %s
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; LLVM should be able to cope with multiple uses of the same flag-setting
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; instruction at different points of a routine. Either by rematerializing the
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; compare or by saving and restoring the flag register.
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declare void @bar()
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@var = global i32 0
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define i32 @test_multiflag(i32 %n, i32 %m, i32 %o) {
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; CHECK-LABEL: test_multiflag:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w19, -8
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; CHECK-NEXT: .cfi_offset w20, -16
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; CHECK-NEXT: .cfi_offset w30, -32
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; CHECK-NEXT: adrp x8, :got:var
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; CHECK-NEXT: cmp w0, w1
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; CHECK-NEXT: mov w19, w1
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; CHECK-NEXT: ldr x8, [x8, :got_lo12:var]
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; CHECK-NEXT: cset w9, ne
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; CHECK-NEXT: mov w20, w0
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; CHECK-NEXT: str w9, [x8]
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; CHECK-NEXT: bl bar
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; CHECK-NEXT: cmp w20, w19
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; CHECK-NEXT: b.eq .LBB0_2
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; CHECK-NEXT: // %bb.1: // %iftrue
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; CHECK-NEXT: mov w0, #42 // =0x2a
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; CHECK-NEXT: b .LBB0_3
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; CHECK-NEXT: .LBB0_2: // %iffalse
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: .LBB0_3: // %iftrue
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; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%test = icmp ne i32 %n, %m
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%val = zext i1 %test to i32
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store i32 %val, ptr @var
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call void @bar()
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; Currently, the comparison is emitted again. An MSR/MRS pair would also be
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; acceptable, but assuming the call preserves NZCV is not.
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br i1 %test, label %iftrue, label %iffalse
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iftrue:
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ret i32 42
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iffalse:
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ret i32 0
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}
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