derek.holloway
7502bf64a4
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70 lines
2.4 KiB
LLVM
70 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s
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define float @test_tdo_scalar_f32_asinpi() {
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; CHECK-LABEL: define float @test_tdo_scalar_f32_asinpi() {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: ret float 0.000000e+00
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;
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entry:
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%c = call float @_Z6asinpif(float 0.000000e+00)
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ret float %c
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}
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define <4 x float> @test_tdo_v2_f32_asinpi() {
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; CHECK-LABEL: define <4 x float> @test_tdo_v2_f32_asinpi() {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: ret <4 x float> <float 0.000000e+00, float -0.000000e+00, float 5.000000e-01, float -5.000000e-01>
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;
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entry:
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%c = call <4 x float> @_Z6asinpiDv4_f(<4 x float> <float 0.000000e+00, float -0.000000e+00, float 1.000000e+00, float -1.000000e+00>)
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ret <4 x float> %c
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}
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define half @test_tdo_scalar_f16_asinpi() {
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; CHECK-LABEL: define half @test_tdo_scalar_f16_asinpi() {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: ret half 0.000000e+00
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;
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entry:
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%c = call half @_Z6asinpiDh(half 0.000000e+00)
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ret half %c
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}
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define <4 x half> @test_tdo_v2_f16_asinpi() {
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; CHECK-LABEL: define <4 x half> @test_tdo_v2_f16_asinpi() {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: ret <4 x half> <half 0.000000e+00, half -0.000000e+00, half 5.000000e-01, half -5.000000e-01>
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;
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entry:
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%c = call <4 x half> @_Z6asinpiDv4_Dh(<4 x half> <half 0.000000e+00, half -0.000000e+00, half 1.000000e+00, half -1.000000e+00>)
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ret <4 x half> %c
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}
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define double @test_tdo_scalar_f64_asinpi() {
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; CHECK-LABEL: define double @test_tdo_scalar_f64_asinpi() {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: ret double 0.000000e+00
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;
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entry:
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%c = call double @_Z6asinpid(double 0.000000e+00)
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ret double %c
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}
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define <4 x double> @test_tdo_v2_f64_asinpi() {
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; CHECK-LABEL: define <4 x double> @test_tdo_v2_f64_asinpi() {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: ret <4 x double> <double 0.000000e+00, double -0.000000e+00, double 5.000000e-01, double -5.000000e-01>
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;
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entry:
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%c = call <4 x double> @_Z6asinpiDv4_d(<4 x double> <double 0.000000e+00, double -0.000000e+00, double 1.000000e+00, double -1.000000e+00>)
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ret <4 x double> %c
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}
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declare float @_Z6asinpif(float)
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declare <4 x float> @_Z6asinpiDv4_f(<4 x float>)
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declare half @_Z6asinpiDh(half)
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declare <4 x half> @_Z6asinpiDv4_Dh(<4 x half>)
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declare double @_Z6asinpid(double)
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declare <4 x double> @_Z6asinpiDv4_d(<4 x double>)
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