derek.holloway
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53 lines
2.0 KiB
LLVM
53 lines
2.0 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck %s
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; CHECK-LABEL: {{^}}v_fadd_f64:
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; CHECK: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @v_fadd_f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2) {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep1 = getelementptr inbounds double, ptr addrspace(1) %in1, i32 %tid
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%gep2 = getelementptr inbounds double, ptr addrspace(1) %in2, i32 %tid
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%r0 = load double, ptr addrspace(1) %gep1
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%r1 = load double, ptr addrspace(1) %gep2
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%r2 = fadd double %r0, %r1
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store double %r2, ptr addrspace(1) %out
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ret void
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}
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; CHECK-LABEL: {{^}}s_fadd_f64:
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; CHECK: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @s_fadd_f64(ptr addrspace(1) %out, double %r0, double %r1) {
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%r2 = fadd double %r0, %r1
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store double %r2, ptr addrspace(1) %out
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ret void
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}
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; CHECK-LABEL: {{^}}v_fadd_v2f64:
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; CHECK: v_add_f64
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; CHECK: v_add_f64
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; CHECK: _store_dwordx4
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define amdgpu_kernel void @v_fadd_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2) {
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%r0 = load <2 x double>, ptr addrspace(1) %in1
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%r1 = load <2 x double>, ptr addrspace(1) %in2
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%r2 = fadd <2 x double> %r0, %r1
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store <2 x double> %r2, ptr addrspace(1) %out
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ret void
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}
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; CHECK-LABEL: {{^}}s_fadd_v2f64:
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; CHECK: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}
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; CHECK: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}
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; CHECK: _store_dwordx4
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define amdgpu_kernel void @s_fadd_v2f64(ptr addrspace(1) %out, <2 x double> %r0, <2 x double> %r1) {
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%r2 = fadd <2 x double> %r0, %r1
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store <2 x double> %r2, ptr addrspace(1) %out
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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