derek.holloway
7502bf64a4
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17 lines
617 B
LLVM
17 lines
617 B
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=tahiti -disable-promote-alloca-to-vector -disable-promote-alloca-to-lds < %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -disable-promote-alloca-to-vector -disable-promote-alloca-to-lds < %s
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; Test that INSERT_SUBREG instructions don't have non-register operands after
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; instruction selection.
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; Make sure this doesn't crash
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; CHECK-LABEL: test:
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define amdgpu_kernel void @test(ptr addrspace(1) %out) {
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entry:
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%tmp0 = alloca [16 x i32], addrspace(5)
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%tmp1 = ptrtoint ptr addrspace(5) %tmp0 to i32
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%tmp2 = sext i32 %tmp1 to i64
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store i64 %tmp2, ptr addrspace(1) %out
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ret void
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}
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