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TheRock/compiler/amd-llvm/llvm/test/CodeGen/DirectX/exp.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

36 lines
1.2 KiB
LLVM

; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
; Make sure dxil operation function calls for exp are generated for float and half.
; CHECK-LABEL: exp_float
; CHECK: fmul float f0x3FB8AA3B, %{{.*}}
; CHECK: call float @dx.op.unary.f32(i32 21, float %{{.*}})
define noundef float @exp_float(float noundef %a) {
entry:
%a.addr = alloca float, align 4
store float %a, ptr %a.addr, align 4
%0 = load float, ptr %a.addr, align 4
%elt.exp = call float @llvm.exp.f32(float %0)
ret float %elt.exp
}
; CHECK-LABEL: exp_half
; CHECK: fmul half 1.442380e+00, %{{.*}}
; CHECK: call half @dx.op.unary.f16(i32 21, half %{{.*}})
; Function Attrs: noinline nounwind optnone
define noundef half @exp_half(half noundef %a) {
entry:
%a.addr = alloca half, align 2
store half %a, ptr %a.addr, align 2
%0 = load half, ptr %a.addr, align 2
%elt.exp = call half @llvm.exp.f16(half %0)
ret half %elt.exp
}
; CHECK-DAG: declare half @dx.op.unary.f16(i32, half) #[[#ATTR0:]]
; CHECK-DAG: declare float @dx.op.unary.f32(i32, float) #[[#ATTR0]]
; CHECK: attributes #[[#ATTR0]] = { nounwind memory(none) }
declare half @llvm.exp.f16(half)
declare float @llvm.exp.f32(float)