derek.holloway
7502bf64a4
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113 lines
2.7 KiB
LLVM
113 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=hexagon < %s | FileCheck %s
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define void @f0(ptr %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f0:
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; CHECK: // %bb.0:
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; CHECK-NEXT: {
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; CHECK-NEXT: p0 = tstbit(r1,#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r2 = asl(r2,#2)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r4 = memub(r0+#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r3 = #4
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r1 = mux(p0,#-1,#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r4 = insert(r1,r3:2)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r1 = and(r4,#255)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: memb(r0+#0) = r1
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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%v0 = load <2 x i1>, ptr %a0
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%v1 = trunc i32 %a1 to i1
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%v2 = insertelement <2 x i1> %v0, i1 %v1, i32 %a2
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store <2 x i1> %v2, ptr %a0
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ret void
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}
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define void @f1(ptr %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: {
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; CHECK-NEXT: p0 = tstbit(r1,#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r2 = asl(r2,#1)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r4 = memub(r0+#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r3 = #2
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r1 = mux(p0,#-1,#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r4 = insert(r1,r3:2)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r1 = and(r4,#255)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: memb(r0+#0) = r1
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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%v0 = load <4 x i1>, ptr %a0
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%v1 = trunc i32 %a1 to i1
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%v2 = insertelement <4 x i1> %v0, i1 %v1, i32 %a2
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store <4 x i1> %v2, ptr %a0
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ret void
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}
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define void @f2(ptr %a0, i32 %a1, i32 %a2) #0 {
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; CHECK-LABEL: f2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: {
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; CHECK-NEXT: p0 = tstbit(r1,#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r6 = memub(r0+#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r3 = #1
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r4 = mux(p0,#-1,#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r6 = insert(r4,r3:2)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r1 = and(r6,#255)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: memb(r0+#0) = r1
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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%v0 = load <8 x i1>, ptr %a0
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%v1 = trunc i32 %a1 to i1
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%v2 = insertelement <8 x i1> %v0, i1 %v1, i32 %a2
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store <8 x i1> %v2, ptr %a0
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ret void
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}
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attributes #0 = { nounwind "target-features"="-packets" }
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