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TheRock/compiler/amd-llvm/llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

84 lines
2.0 KiB
LLVM

; RUN: llc < %s -mtriple=mipsel-unknown-linux-gnu | FileCheck %s --check-prefixes=MIPS32
; RUN: llc < %s -mtriple=mips64el-unknown-linux-gnuabi64 | FileCheck %s --check-prefixes=MIPS64
define i32 @shl_32(i32 %a, i32 %b) {
; MIPS32-LABEL: shl_32:
; MIPS32: # %bb.0:
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: sllv $2, $4, $5
; MIPS64-LABEL: shl_32:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: sll $2, $4, 0
; MIPS64-NEXT: jr $ra
; MIPS64-NEXT: sllv $2, $2, $1
%_1 = and i32 %b, 31
%_0 = shl i32 %a, %_1
ret i32 %_0
}
define i32 @lshr_32(i32 %a, i32 %b) {
; MIPS32-LABEL: lshr_32:
; MIPS32: # %bb.0:
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: srlv $2, $4, $5
; MIPS64-LABEL: lshr_32:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: sll $2, $4, 0
; MIPS64-NEXT: jr $ra
; MIPS64-NEXT: srlv $2, $2, $1
%_1 = and i32 %b, 31
%_0 = lshr i32 %a, %_1
ret i32 %_0
}
define i32 @ashr_32(i32 %a, i32 %b) {
; MIPS32-LABEL: ashr_32:
; MIPS32: # %bb.0:
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: srav $2, $4, $5
; MIPS64-LABEL: ashr_32:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: sll $2, $4, 0
; MIPS64-NEXT: jr $ra
; MIPS64-NEXT: srav $2, $2, $1
%_1 = and i32 %b, 31
%_0 = ashr i32 %a, %_1
ret i32 %_0
}
define i64 @shl_64(i64 %a, i64 %b) {
; MIPS64-LABEL: shl_64:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: jr $ra
; MIPS64-NEXT: dsllv $2, $4, $1
%_1 = and i64 %b, 63
%_0 = shl i64 %a, %_1
ret i64 %_0
}
define i64 @lshr_64(i64 %a, i64 %b) {
; MIPS64-LABEL: lshr_64:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: jr $ra
; MIPS64-NEXT: dsrlv $2, $4, $1
%_1 = and i64 %b, 63
%_0 = lshr i64 %a, %_1
ret i64 %_0
}
define i64 @ashr_64(i64 %a, i64 %b) {
; MIPS64-LABEL: ashr_64:
; MIPS64: # %bb.0:
; MIPS64-NEXT: sll $1, $5, 0
; MIPS64-NEXT: jr $ra
; MIPS64-NEXT: dsrav $2, $4, $1
%_1 = and i64 %b, 63
%_0 = ashr i64 %a, %_1
ret i64 %_0
}