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TheRock/compiler/amd-llvm/llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll
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2026-09-02 16:34:47 -07:00

22 lines
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LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr10 -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \
; RUN: | FileCheck %s
define void @copy_novsrp() local_unnamed_addr {
; CHECK-LABEL: copy_novsrp:
; CHECK: # %bb.0: # %dmblvi_entry
; CHECK-NEXT: xxlxor vs0, vs0, vs0
; CHECK-NEXT: xxlxor vs3, vs3, vs3
; CHECK-NEXT: stxv vs0, 0(0)
dmblvi_entry:
%0 = tail call <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8> zeroinitializer, <16 x i8> undef, <16 x i8> undef, <16 x i8> zeroinitializer)
%1 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> %0)
%2 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %1, 3
store <16 x i8> %2, ptr null, align 1
unreachable
}
declare <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)
declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1>)