derek.holloway
7502bf64a4
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78 lines
3.9 KiB
LLVM
78 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: -mcpu=pwr9 -mtriple=powerpc64 < %s | FileCheck %s
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define dso_local <16 x i8> @ConvertExtractedMaskBitsToVect(<16 x i8> noundef %0) {
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; CHECK-LABEL: ConvertExtractedMaskBitsToVect:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addis r3, r2, .LCPI0_0@toc@ha
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; CHECK-NEXT: xxlxor v3, v3, v3
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; CHECK-NEXT: addi r3, r3, .LCPI0_0@toc@l
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: addis r3, r2, .LCPI0_1@toc@ha
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; CHECK-NEXT: addi r3, r3, .LCPI0_1@toc@l
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; CHECK-NEXT: xxperm v2, v3, vs0
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: xxland v2, v2, vs0
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; CHECK-NEXT: vcmpgtub v2, v2, v3
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; CHECK-NEXT: blr
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%a4 = extractelement <16 x i8> %0, i64 7
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%a5 = zext i8 %a4 to i16
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%a6 = insertelement <8 x i16> poison, i16 %a5, i64 0
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%a7 = bitcast <8 x i16> %a6 to <16 x i8>
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%a8 = shufflevector <16 x i8> %a7, <16 x i8> undef, <16 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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%a9 = and <16 x i8> %a8, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a10 = icmp eq <16 x i8> %a9, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a11 = sext <16 x i1> %a10 to <16 x i8>
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ret <16 x i8> %a11
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}
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define dso_local <16 x i8> @ConvertExtractedMaskBitsToVect2(<16 x i8> noundef %0) {
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; CHECK-LABEL: ConvertExtractedMaskBitsToVect2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addis r3, r2, .LCPI1_0@toc@ha
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; CHECK-NEXT: xxlxor v3, v3, v3
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; CHECK-NEXT: addi r3, r3, .LCPI1_0@toc@l
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: addis r3, r2, .LCPI1_1@toc@ha
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; CHECK-NEXT: addi r3, r3, .LCPI1_1@toc@l
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; CHECK-NEXT: xxperm v2, v3, vs0
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: xxland v2, v2, vs0
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; CHECK-NEXT: vcmpgtub v2, v2, v3
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; CHECK-NEXT: blr
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%a4 = extractelement <16 x i8> %0, i64 7
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%a5 = zext i8 %a4 to i32
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%a6 = insertelement <4 x i32> poison, i32 %a5, i64 0
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%a7 = bitcast <4 x i32> %a6 to <16 x i8>
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%a8 = shufflevector <16 x i8> %a7, <16 x i8> undef, <16 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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%a9 = and <16 x i8> %a8, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a10 = icmp eq <16 x i8> %a9, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a11 = sext <16 x i1> %a10 to <16 x i8>
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ret <16 x i8> %a11
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}
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define dso_local <16 x i8> @ConvertExtractedMaskBitsToVect3(<8 x i16> noundef %0) {
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; CHECK-LABEL: ConvertExtractedMaskBitsToVect3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addis r3, r2, .LCPI2_0@toc@ha
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; CHECK-NEXT: xxlxor v3, v3, v3
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; CHECK-NEXT: addi r3, r3, .LCPI2_0@toc@l
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: addis r3, r2, .LCPI2_1@toc@ha
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; CHECK-NEXT: addi r3, r3, .LCPI2_1@toc@l
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; CHECK-NEXT: xxperm v2, v3, vs0
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; CHECK-NEXT: lxv vs0, 0(r3)
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; CHECK-NEXT: xxland v2, v2, vs0
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; CHECK-NEXT: vcmpgtub v2, v2, v3
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; CHECK-NEXT: blr
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%a4 = extractelement <8 x i16> %0, i64 3
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%a5 = zext i16 %a4 to i32
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%a6 = insertelement <4 x i32> poison, i32 %a5, i64 0
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%a7 = bitcast <4 x i32> %a6 to <16 x i8>
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%a8 = shufflevector <16 x i8> %a7, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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%a9 = and <16 x i8> %a8, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a10 = icmp eq <16 x i8> %a9, <i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 -128>
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%a11 = sext <16 x i1> %a10 to <16 x i8>
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ret <16 x i8> %a11
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}
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