derek.holloway
7502bf64a4
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39 lines
1.7 KiB
LLVM
39 lines
1.7 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 -ppc-disable-perfect-shuffle=false | not grep vperm
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; TODO: Fix this case when disabling perfect shuffle
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define <4 x float> @test_uu72(ptr %P1, ptr %P2) {
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%V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]
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%V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]
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%V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 undef, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1]
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ret <4 x float> %V3
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}
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define <4 x float> @test_30u5(ptr %P1, ptr %P2) {
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%V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]
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%V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]
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%V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 0, i32 undef, i32 5 > ; <<4 x float>> [#uses=1]
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ret <4 x float> %V3
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}
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define <4 x float> @test_3u73(ptr %P1, ptr %P2) {
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%V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]
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%V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]
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%V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 undef, i32 7, i32 3 > ; <<4 x float>> [#uses=1]
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ret <4 x float> %V3
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}
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define <4 x float> @test_3774(ptr %P1, ptr %P2) {
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%V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]
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%V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]
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%V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 7, i32 7, i32 4 > ; <<4 x float>> [#uses=1]
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ret <4 x float> %V3
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}
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define <4 x float> @test_4450(ptr %P1, ptr %P2) {
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%V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]
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%V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]
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%V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 4, i32 4, i32 5, i32 0 > ; <<4 x float>> [#uses=1]
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ret <4 x float> %V3
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}
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