derek.holloway
7502bf64a4
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65 lines
1.9 KiB
LLVM
65 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z16 | FileCheck %s
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;
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; Test handling of fp16 IR vector arguments for z16 (with vector support).
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define <1 x half> @pass_half_1(<1 x half> %Dummy, <1 x half> %Arg) {
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; CHECK-LABEL: pass_half_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlr %v24, %v26
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; CHECK-NEXT: br %r14
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ret <1 x half> %Arg
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}
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define <4 x half> @pass_half_4(<1 x half> %Dummy, <4 x half> %Arg) {
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; CHECK-LABEL: pass_half_4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlr %v24, %v26
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; CHECK-NEXT: br %r14
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ret <4 x half> %Arg
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}
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define <8 x half> @pass_half_8(<1 x half> %Dummy, <8 x half> %Arg) {
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; CHECK-LABEL: pass_half_8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlr %v24, %v26
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; CHECK-NEXT: br %r14
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ret <8 x half> %Arg
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}
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define <16 x half> @pass_half_16(<1 x half> %Dummy, <16 x half> %Arg) {
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; CHECK-LABEL: pass_half_16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlr %v24, %v26
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; CHECK-NEXT: vlr %v26, %v28
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; CHECK-NEXT: br %r14
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ret <16 x half> %Arg
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}
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define <24 x half> @pass_half_24(<1 x half> %Dummy, <24 x half> %Arg) {
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; CHECK-LABEL: pass_half_24:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlr %v24, %v26
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; CHECK-NEXT: vlr %v26, %v28
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; CHECK-NEXT: vlr %v28, %v30
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; CHECK-NEXT: br %r14
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ret <24 x half> %Arg
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}
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define <72 x half> @pass_half_72(<72 x half> %Arg) {
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; CHECK-LABEL: pass_half_72:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 160(%r15), 3
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; CHECK-NEXT: vst %v0, 128(%r2), 4
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; CHECK-NEXT: vst %v31, 112(%r2), 4
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; CHECK-NEXT: vst %v29, 96(%r2), 4
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; CHECK-NEXT: vst %v27, 80(%r2), 4
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; CHECK-NEXT: vst %v25, 64(%r2), 4
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; CHECK-NEXT: vst %v30, 48(%r2), 4
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; CHECK-NEXT: vst %v28, 32(%r2), 4
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; CHECK-NEXT: vst %v26, 16(%r2), 4
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; CHECK-NEXT: vst %v24, 0(%r2), 4
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; CHECK-NEXT: br %r14
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ret <72 x half> %Arg
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}
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