derek.holloway
7502bf64a4
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24 lines
746 B
LLVM
24 lines
746 B
LLVM
; RUN: llc < %s -asm-verbose=false -fast-isel=false -disable-wasm-fallthrough-return-opt | FileCheck %s
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target triple = "wasm32-unknown-unknown"
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; This should be treated as a non-splat vector of pow2 divisor, so sdivs will be
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; transformed to shrs in DAGCombiner. There will be 4 stores and 3 shrs (For '1'
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; entry we don't need a shr).
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; CHECK-LABEL: vector_sdiv:
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; CHECK-DAG: i32.store
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; CHECK-DAG: i32.shr_u
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; CHECK-DAG: i32.store
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; CHECK-DAG: i32.shr_u
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; CHECK-DAG: i32.store
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; CHECK-DAG: i32.shr_u
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; CHECK-DAG: i32.store
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define void @vector_sdiv(ptr %x, ptr readonly %y) {
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entry:
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%0 = load <4 x i32>, ptr %y, align 16
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%div = sdiv <4 x i32> %0, <i32 1, i32 4, i32 2, i32 8>
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store <4 x i32> %div, ptr %x, align 16
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ret void
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}
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