derek.holloway
7502bf64a4
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115 lines
3.8 KiB
LLVM
115 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=SSE
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=SSE
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=AVX,AVX512
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=AVX,AVX512
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define <4 x float> @test_fmul_v4f32(<4 x float> %arg1, <4 x float> %arg2) {
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; SSE-LABEL: test_fmul_v4f32:
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; SSE: # %bb.0:
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; SSE-NEXT: mulps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test_fmul_v4f32:
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; AVX: # %bb.0:
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; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%ret = fmul <4 x float> %arg1, %arg2
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ret <4 x float> %ret
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}
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define <2 x double> @test_fmul_v2f64(<2 x double> %arg1, <2 x double> %arg2) {
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; SSE-LABEL: test_fmul_v2f64:
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; SSE: # %bb.0:
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; SSE-NEXT: mulpd %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test_fmul_v2f64:
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; AVX: # %bb.0:
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; AVX-NEXT: vmulpd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%ret = fmul <2 x double> %arg1, %arg2
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ret <2 x double> %ret
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}
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define <8 x float> @test_fmul_v8f32(<8 x float> %arg1, <8 x float> %arg2) {
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; SSE-LABEL: test_fmul_v8f32:
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; SSE: # %bb.0:
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; SSE-NEXT: mulps %xmm2, %xmm0
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; SSE-NEXT: mulps %xmm3, %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test_fmul_v8f32:
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; AVX: # %bb.0:
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; AVX-NEXT: vmulps %ymm1, %ymm0, %ymm0
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; AVX-NEXT: retq
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%ret = fmul <8 x float> %arg1, %arg2
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ret <8 x float> %ret
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}
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define <4 x double> @test_fmul_v4f64(<4 x double> %arg1, <4 x double> %arg2) {
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; SSE-LABEL: test_fmul_v4f64:
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; SSE: # %bb.0:
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; SSE-NEXT: mulpd %xmm2, %xmm0
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; SSE-NEXT: mulpd %xmm3, %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test_fmul_v4f64:
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; AVX: # %bb.0:
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; AVX-NEXT: vmulpd %ymm1, %ymm0, %ymm0
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; AVX-NEXT: retq
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%ret = fmul <4 x double> %arg1, %arg2
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ret <4 x double> %ret
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}
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define <16 x float> @test_fmul_v16f32(<16 x float> %arg1, <16 x float> %arg2) {
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; SSE-LABEL: test_fmul_v16f32:
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; SSE: # %bb.0:
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; SSE-NEXT: mulps %xmm4, %xmm0
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; SSE-NEXT: mulps %xmm5, %xmm1
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; SSE-NEXT: mulps %xmm6, %xmm2
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; SSE-NEXT: mulps %xmm7, %xmm3
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: test_fmul_v16f32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmulps %ymm2, %ymm0, %ymm0
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; AVX1-NEXT: vmulps %ymm3, %ymm1, %ymm1
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: test_fmul_v16f32:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vmulps %zmm1, %zmm0, %zmm0
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; AVX512-NEXT: retq
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%ret = fmul <16 x float> %arg1, %arg2
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ret <16 x float> %ret
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}
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define <8 x double> @test_fmul_v8f64(<8 x double> %arg1, <8 x double> %arg2) {
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; SSE-LABEL: test_fmul_v8f64:
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; SSE: # %bb.0:
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; SSE-NEXT: mulpd %xmm4, %xmm0
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; SSE-NEXT: mulpd %xmm5, %xmm1
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; SSE-NEXT: mulpd %xmm6, %xmm2
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; SSE-NEXT: mulpd %xmm7, %xmm3
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: test_fmul_v8f64:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vmulpd %ymm2, %ymm0, %ymm0
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; AVX1-NEXT: vmulpd %ymm3, %ymm1, %ymm1
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: test_fmul_v8f64:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm0
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; AVX512-NEXT: retq
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%ret = fmul <8 x double> %arg1, %arg2
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ret <8 x double> %ret
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}
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