derek.holloway
7502bf64a4
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48 lines
2.0 KiB
LLVM
48 lines
2.0 KiB
LLVM
; RUN: llvm-as %s -o %t.bc
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; RUN: llvm-spirv -s %t.bc -o %t.regularized.bc
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; RUN: llvm-dis %t.regularized.bc -o %t.regularized.ll
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; RUN: FileCheck < %t.regularized.ll %s
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; Translation cycle should be successful:
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; RUN: llvm-spirv %t.regularized.bc -o %t.spv
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; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
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; RUN: %if spirv-backend %{ llc -O0 -mtriple=spirv64-unknown-unknown -filetype=obj %s -o %t.llc.spv %}
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; RUN: %if spirv-backend %{ llvm-spirv -r %t.llc.spv -o %t.llc.rev.bc %}
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; CHECK: %[[#Base:]] = load i1, ptr addrspace(4){{.*}}, align 1
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; CHECK: %[[#LoadShift:]] = load i32, ptr addrspace(4){{.*}} align 4
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; CHECK: %[[#AndShift:]] = and i32 %[[#LoadShift]], 1
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; CHECK: %[[#CmpShift:]] = icmp ne i32 %[[#AndShift]], 0
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; CHECK: %[[#ExtBase:]] = select i1 %[[#Base]], i32 1, i32 0
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; CHECK: %[[#ExtShift:]] = select i1 %[[#CmpShift]], i32 1, i32 0
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; CHECK: %[[#LSHR:]] = lshr i32 %[[#ExtBase]], %[[#ExtShift]]
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; CHECK: and i32 %[[#LSHR]], 1
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; CHECK: %[[#ExtVecBase:]] = select <2 x i1> %vec1, <2 x i32> splat (i32 1), <2 x i32> zeroinitializer
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; CHECK: %[[#ExtVecShift:]] = select <2 x i1> %vec2, <2 x i32> splat (i32 1), <2 x i32> zeroinitializer
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; CHECK: lshr <2 x i32> %[[#ExtVecBase]], %[[#ExtVecShift]]
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; ModuleID = 'source.bc'
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source_filename = "source.cpp"
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target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
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target triple = "spir64-unknown-unknown"
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%"class.ac" = type { i1 }
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; Function Attrs: convergent mustprogress norecurse nounwind
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define linkonce_odr dso_local spir_func void @foo(<2 x i1> %vec1, <2 x i1> %vec2) align 2 {
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%1 = alloca ptr addrspace(4), align 8
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%2 = alloca i32, align 4
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%3 = addrspacecast ptr %1 to ptr addrspace(4)
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%4 = addrspacecast ptr %2 to ptr addrspace(4)
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%5 = load ptr addrspace(4), ptr addrspace(4) %3, align 8
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%6 = load i1, ptr addrspace(4) %5, align 1
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%7 = load i32, ptr addrspace(4) %4, align 4
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%8 = trunc i32 %7 to i1
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%9 = lshr i1 %6, %8
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%10 = zext i1 %9 to i32
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%11 = and i32 %10, 1
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%12 = lshr <2 x i1> %vec1, %vec2
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ret void
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}
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