derek.holloway
7502bf64a4
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50 lines
1.9 KiB
LLVM
50 lines
1.9 KiB
LLVM
; RUN: llvm-as %s -o %t.bc
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; RUN: llvm-spirv %t.bc -o %t.spv
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; RUN: llvm-spirv %t.bc -spirv-text -o %t.txt
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; RUN: FileCheck < %t.txt %s --check-prefix=CHECK-SPIRV
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; RUN: spirv-val %t.spv
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; RUN: llvm-spirv -r -o - %t.spv | llvm-dis | FileCheck %s --check-prefix=CHECK-LLVM
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; RUN: %if spirv-backend %{ llc -O0 -mtriple=spirv64-unknown-unknown -filetype=obj %s -o %t.llc.spv %}
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; RUN: %if spirv-backend %{ llvm-spirv -r %t.llc.spv -o %t.llc.rev.bc %}
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; RUN: %if spirv-backend %{ llvm-dis %t.llc.rev.bc -o %t.llc.rev.ll %}
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; RUN: %if spirv-backend %{ FileCheck %s --check-prefix=CHECK-LLVM < %t.llc.rev.ll %}
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target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
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target triple = "spir64"
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; CHECK-SPIRV-DAG: TypeInt [[#TyInt32:]] 32 0
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; CHECK-SPIRV-DAG: TypeInt [[#TyInt16:]] 16 0
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; CHECK-SPIRV-DAG: TypeFloat [[#TyHalf:]] 16
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; CHECK-SPIRV-DAG: TypeVector [[#vec4_int_16:]] [[#TyInt16]] 4
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; CHECK-SPIRV-DAG: TypeVector [[#vec4_float_16:]] [[#TyHalf]] 4
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; CHECK-SPIRV-DAG: FunctionParameter [[#TyInt32]] [[#Arg32:]]
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; CHECK-SPIRV-DAG: UConvert [[#TyInt16]] [[#Arg16:]] [[#Arg32]]
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; CHECK-SPIRV-DAG: Bitcast [[#TyHalf]] [[#ValHalf:]] [[#Arg16]]
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; CHECK-SPIRV-DAG: FMul [[#TyHalf]] [[#ValHalf2:]] [[#ValHalf]] [[#ValHalf]]
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; CHECK-SPIRV-DAG: Bitcast [[#TyInt16]] [[#Res16:]] [[#ValHalf2]]
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; CHECK-SPIRV-DAG: ReturnValue [[#Res16]]
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; CHECK-LLVM: trunc
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; CHECK-LLVM: bitcast
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; CHECK-LLVM: fmul
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; CHECK-LLVM: bitcast
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define i16 @foo(i32 %arg) {
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entry:
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%op16 = trunc i32 %arg to i16
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%val = bitcast i16 %op16 to half
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%val2 = fmul half %val, %val
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%res = bitcast half %val2 to i16
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ret i16 %res
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}
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define <4 x i16> @test_vector_half4(<4 x half> nofpclass(nan inf) %p1) {
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entry:
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; CHECK-SPIRV: FunctionParameter [[#vec4_float_16]] [[#arg0:]]
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; CHECK-SPIRV: Bitcast [[#vec4_int_16]] [[#Res1:]] [[#arg0]]
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; CHECK-LLVM: bitcast
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%0 = bitcast <4 x half> %p1 to <4 x i16>
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; CHECK-SPIRV: ReturnValue [[#Res1]]
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ret <4 x i16> %0
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}
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