derek.holloway
7502bf64a4
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286 lines
14 KiB
LLVM
286 lines
14 KiB
LLVM
; RUN: llvm-as %s -o %t.bc
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; RUN: llvm-spirv %t.bc -spirv-text -o %t.txt
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; RUN: FileCheck < %t.txt %s --check-prefix=CHECK-SPIRV
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; RUN: llvm-spirv %t.bc -o %t.spv
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; RUN: spirv-val %t.spv
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; RUN: llvm-spirv -r %t.spv -o %t.rev.spv.bc --spirv-target-env=SPV-IR
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; RUN: llvm-dis < %t.rev.spv.bc | FileCheck %s --check-prefix=CHECK-SPV-IR
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; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
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; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
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; RUN: %if spirv-backend %{ llc -O0 -mtriple=spirv64-unknown-unknown -filetype=obj %s -o %t.llc.spv %}
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; RUN: %if spirv-backend %{ llvm-spirv -r --spirv-target-env=SPV-IR %t.llc.spv -o %t.llc.rev.bc %}
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; RUN: %if spirv-backend %{ llvm-dis %t.llc.rev.bc -o %t.llc.rev.ll %}
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; RUN: %if spirv-backend %{ FileCheck %s --check-prefix=CHECK-SPV-IR < %t.llc.rev.ll %}
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; This test checks following SYCL relational builtins with double and double2
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; types:
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; isfinite, isinf, isnan, isnormal, signbit, isequal, isnotequal, isgreater
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; isgreaterequal, isless, islessequal, islessgreater, isordered, isunordered
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; CHECK-SPIRV: 2 TypeBool [[BoolTypeID:[0-9]+]]
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; CHECK-SPIRV: 4 TypeVector [[BoolVectorTypeID:[0-9]+]] [[BoolTypeID]] 2
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; CHECK-SPIRV: 4 IsFinite [[BoolTypeID]]
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; CHECK-SPIRV: 4 IsInf [[BoolTypeID]]
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; CHECK-SPIRV: 4 IsNan [[BoolTypeID]]
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; CHECK-SPIRV: 4 IsNormal [[BoolTypeID]]
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; CHECK-SPIRV: 4 SignBitSet [[BoolTypeID]]
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; CHECK-SPIRV: 5 FOrdEqual [[BoolTypeID]]
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; CHECK-SPIRV: 5 FUnordNotEqual [[BoolTypeID]]
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; CHECK-SPIRV: 5 FOrdGreaterThan [[BoolTypeID]]
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; CHECK-SPIRV: 5 FOrdGreaterThanEqual [[BoolTypeID]]
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; CHECK-SPIRV: 5 FOrdLessThan [[BoolTypeID]]
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; CHECK-SPIRV: 5 FOrdLessThanEqual [[BoolTypeID]]
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; CHECK-SPIRV: 5 FOrdNotEqual [[BoolTypeID]]
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; CHECK-SPIRV: 5 Ordered [[BoolTypeID]]
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; CHECK-SPIRV: 5 Unordered [[BoolTypeID]]
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; CHECK-SPIRV: 4 IsFinite [[BoolVectorTypeID]]
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; CHECK-SPIRV: 4 IsInf [[BoolVectorTypeID]]
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; CHECK-SPIRV: 4 IsNan [[BoolVectorTypeID]]
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; CHECK-SPIRV: 4 IsNormal [[BoolVectorTypeID]]
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; CHECK-SPIRV: 4 SignBitSet [[BoolVectorTypeID]]
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; CHECK-SPIRV: 5 FOrdEqual [[BoolVectorTypeID]]
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; CHECK-SPIRV: 5 FUnordNotEqual [[BoolVectorTypeID]]
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; CHECK-SPIRV: 5 FOrdGreaterThan [[BoolVectorTypeID]]
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; CHECK-SPIRV: 5 FOrdGreaterThanEqual [[BoolVectorTypeID]]
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; CHECK-SPIRV: 5 FOrdLessThan [[BoolVectorTypeID]]
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; CHECK-SPIRV: 5 FOrdLessThanEqual [[BoolVectorTypeID]]
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; CHECK-SPIRV: 5 FOrdNotEqual [[BoolVectorTypeID]]
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; CHECK-SPIRV: 5 Ordered [[BoolVectorTypeID]]
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; CHECK-SPIRV: 5 Unordered [[BoolVectorTypeID]]
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; CHECK-SPV-IR: call spir_func i1 @_Z16__spirv_IsFinited(double
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; CHECK-SPV-IR: call spir_func i1 @_Z13__spirv_IsInfd(double
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; CHECK-SPV-IR: call spir_func i1 @_Z13__spirv_IsNand(double
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; CHECK-SPV-IR: call spir_func i1 @_Z16__spirv_IsNormald(double
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; CHECK-SPV-IR: call spir_func i1 @_Z18__spirv_SignBitSetd(double
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; CHECK-SPV-IR: fcmp oeq double
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; CHECK-SPV-IR: fcmp une double
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; CHECK-SPV-IR: fcmp ogt double
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; CHECK-SPV-IR: fcmp oge double
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; CHECK-SPV-IR: fcmp olt double
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; CHECK-SPV-IR: fcmp ole double
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; CHECK-SPV-IR: fcmp one double
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; CHECK-SPV-IR: fcmp ord double
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; CHECK-SPV-IR: fcmp uno double
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; CHECK-SPV-IR: call spir_func <2 x i8> @_Z16__spirv_IsFiniteDv2_d(<2 x double>
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; CHECK-SPV-IR: call spir_func <2 x i8> @_Z13__spirv_IsInfDv2_d(<2 x double>
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; CHECK-SPV-IR: call spir_func <2 x i8> @_Z13__spirv_IsNanDv2_d(<2 x double>
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; CHECK-SPV-IR: call spir_func <2 x i8> @_Z16__spirv_IsNormalDv2_d(<2 x double>
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; CHECK-SPV-IR: call spir_func <2 x i8> @_Z18__spirv_SignBitSetDv2_d(<2 x double>
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; CHECK-SPV-IR: fcmp oeq <2 x double>
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; CHECK-SPV-IR: fcmp une <2 x double>
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; CHECK-SPV-IR: fcmp ogt <2 x double>
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; CHECK-SPV-IR: fcmp oge <2 x double>
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; CHECK-SPV-IR: fcmp olt <2 x double>
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; CHECK-SPV-IR: fcmp ole <2 x double>
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; CHECK-SPV-IR: fcmp one <2 x double>
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; CHECK-SPV-IR: fcmp ord <2 x double>
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; CHECK-SPV-IR: fcmp uno <2 x double>
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; CHECK-LLVM: call spir_func i32 @_Z8isfinited(double
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; CHECK-LLVM: call spir_func i32 @_Z5isinfd(double
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; CHECK-LLVM: call spir_func i32 @_Z5isnand(double
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; CHECK-LLVM: call spir_func i32 @_Z8isnormald(double
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; CHECK-LLVM: call spir_func i32 @_Z7signbitd(double
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; CHECK-LLVM: fcmp oeq double
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; CHECK-LLVM: fcmp une double
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; CHECK-LLVM: fcmp ogt double
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; CHECK-LLVM: fcmp oge double
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; CHECK-LLVM: fcmp olt double
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; CHECK-LLVM: fcmp ole double
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; CHECK-LLVM: fcmp one double
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; CHECK-LLVM: fcmp ord double
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; CHECK-LLVM: fcmp uno double
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; CHECK-LLVM: call spir_func <2 x i64> @_Z8isfiniteDv2_d(<2 x double>
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; CHECK-LLVM: call spir_func <2 x i64> @_Z5isinfDv2_d(<2 x double>
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; CHECK-LLVM: call spir_func <2 x i64> @_Z5isnanDv2_d(<2 x double>
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; CHECK-LLVM: call spir_func <2 x i64> @_Z8isnormalDv2_d(<2 x double>
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; CHECK-LLVM: call spir_func <2 x i64> @_Z7signbitDv2_d(<2 x double>
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; CHECK-LLVM: fcmp oeq <2 x double>
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; CHECK-LLVM: fcmp une <2 x double>
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; CHECK-LLVM: fcmp ogt <2 x double>
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; CHECK-LLVM: fcmp oge <2 x double>
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; CHECK-LLVM: fcmp olt <2 x double>
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; CHECK-LLVM: fcmp ole <2 x double>
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; CHECK-LLVM: fcmp one <2 x double>
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; CHECK-LLVM: fcmp ord <2 x double>
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; CHECK-LLVM: fcmp uno <2 x double>
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target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
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target triple = "spir"
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; Function Attrs: convergent mustprogress nofree norecurse nounwind willreturn writeonly
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define dso_local spir_func void @test_scalar(ptr addrspace(4) captures(none) writeonly %out, double %d) local_unnamed_addr #0 {
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entry:
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%call = tail call spir_func i32 @_Z8isfinited(double %d) #3
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%call1 = tail call spir_func i32 @_Z5isinfd(double %d) #3
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%add = add nsw i32 %call1, %call
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%call2 = tail call spir_func i32 @_Z5isnand(double %d) #3
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%add3 = add nsw i32 %add, %call2
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%call4 = tail call spir_func i32 @_Z8isnormald(double %d) #3
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%add5 = add nsw i32 %add3, %call4
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%call6 = tail call spir_func i32 @_Z7signbitd(double %d) #3
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%add7 = add nsw i32 %add5, %call6
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%call8 = tail call spir_func i32 @_Z7isequaldd(double %d, double %d) #3
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%add9 = add nsw i32 %add7, %call8
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%call10 = tail call spir_func i32 @_Z10isnotequaldd(double %d, double %d) #3
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%add11 = add nsw i32 %add9, %call10
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%call12 = tail call spir_func i32 @_Z9isgreaterdd(double %d, double %d) #3
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%add13 = add nsw i32 %add11, %call12
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%call14 = tail call spir_func i32 @_Z14isgreaterequaldd(double %d, double %d) #3
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%add15 = add nsw i32 %add13, %call14
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%call16 = tail call spir_func i32 @_Z6islessdd(double %d, double %d) #3
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%add17 = add nsw i32 %add15, %call16
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%call18 = tail call spir_func i32 @_Z11islessequaldd(double %d, double %d) #3
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%add19 = add nsw i32 %add17, %call18
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%call20 = tail call spir_func i32 @_Z13islessgreaterdd(double %d, double %d) #3
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%add21 = add nsw i32 %add19, %call20
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%call22 = tail call spir_func i32 @_Z9isordereddd(double %d, double %d) #3
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%add23 = add nsw i32 %add21, %call22
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%call24 = tail call spir_func i32 @_Z11isunordereddd(double %d, double %d) #3
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%add25 = add nsw i32 %add23, %call24
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store i32 %add25, ptr addrspace(4) %out, align 4, !tbaa !3
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ret void
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}
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z8isfinited(double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z5isinfd(double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z5isnand(double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z8isnormald(double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z7signbitd(double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z7isequaldd(double, double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z10isnotequaldd(double, double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z9isgreaterdd(double, double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z14isgreaterequaldd(double, double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z6islessdd(double, double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z11islessequaldd(double, double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z13islessgreaterdd(double, double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z9isordereddd(double, double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func i32 @_Z11isunordereddd(double, double) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree norecurse nounwind willreturn writeonly
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define dso_local spir_func void @test_vector(ptr addrspace(4) captures(none) writeonly %out, <2 x double> %d) local_unnamed_addr #2 {
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entry:
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%call = tail call spir_func <2 x i64> @_Z8isfiniteDv2_d(<2 x double> %d) #3
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%call1 = tail call spir_func <2 x i64> @_Z5isinfDv2_d(<2 x double> %d) #3
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%add = add <2 x i64> %call1, %call
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%call2 = tail call spir_func <2 x i64> @_Z5isnanDv2_d(<2 x double> %d) #3
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%add3 = add <2 x i64> %add, %call2
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%call4 = tail call spir_func <2 x i64> @_Z8isnormalDv2_d(<2 x double> %d) #3
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%add5 = add <2 x i64> %add3, %call4
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%call6 = tail call spir_func <2 x i64> @_Z7signbitDv2_d(<2 x double> %d) #3
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%add7 = add <2 x i64> %add5, %call6
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%call8 = tail call spir_func <2 x i64> @_Z7isequalDv2_dS_(<2 x double> %d, <2 x double> %d) #3
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%add9 = add <2 x i64> %add7, %call8
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%call10 = tail call spir_func <2 x i64> @_Z10isnotequalDv2_dS_(<2 x double> %d, <2 x double> %d) #3
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%add11 = add <2 x i64> %add9, %call10
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%call12 = tail call spir_func <2 x i64> @_Z9isgreaterDv2_dS_(<2 x double> %d, <2 x double> %d) #3
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%add13 = add <2 x i64> %add11, %call12
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%call14 = tail call spir_func <2 x i64> @_Z14isgreaterequalDv2_dS_(<2 x double> %d, <2 x double> %d) #3
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%add15 = add <2 x i64> %add13, %call14
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%call16 = tail call spir_func <2 x i64> @_Z6islessDv2_dS_(<2 x double> %d, <2 x double> %d) #3
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%add17 = add <2 x i64> %add15, %call16
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%call18 = tail call spir_func <2 x i64> @_Z11islessequalDv2_dS_(<2 x double> %d, <2 x double> %d) #3
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%add19 = add <2 x i64> %add17, %call18
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%call20 = tail call spir_func <2 x i64> @_Z13islessgreaterDv2_dS_(<2 x double> %d, <2 x double> %d) #3
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%add21 = add <2 x i64> %add19, %call20
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%call22 = tail call spir_func <2 x i64> @_Z9isorderedDv2_dS_(<2 x double> %d, <2 x double> %d) #3
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%add23 = add <2 x i64> %add21, %call22
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%call24 = tail call spir_func <2 x i64> @_Z11isunorderedDv2_dS_(<2 x double> %d, <2 x double> %d) #3
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%add25 = add <2 x i64> %add23, %call24
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store <2 x i64> %add25, ptr addrspace(4) %out, align 16, !tbaa !7
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ret void
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}
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z8isfiniteDv2_d(<2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z5isinfDv2_d(<2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z5isnanDv2_d(<2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z8isnormalDv2_d(<2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z7signbitDv2_d(<2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z7isequalDv2_dS_(<2 x double>, <2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z10isnotequalDv2_dS_(<2 x double>, <2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z9isgreaterDv2_dS_(<2 x double>, <2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z14isgreaterequalDv2_dS_(<2 x double>, <2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z6islessDv2_dS_(<2 x double>, <2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z11islessequalDv2_dS_(<2 x double>, <2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z13islessgreaterDv2_dS_(<2 x double>, <2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z9isorderedDv2_dS_(<2 x double>, <2 x double>) local_unnamed_addr #1
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; Function Attrs: convergent mustprogress nofree nounwind readnone willreturn
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declare spir_func <2 x i64> @_Z11isunorderedDv2_dS_(<2 x double>, <2 x double>) local_unnamed_addr #1
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attributes #0 = { convergent mustprogress nofree norecurse nounwind willreturn writeonly "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #1 = { convergent mustprogress nofree nounwind readnone willreturn "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #2 = { convergent mustprogress nofree norecurse nounwind willreturn writeonly "frame-pointer"="none" "min-legal-vector-width"="128" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
|
|
attributes #3 = { convergent nounwind readnone willreturn }
|
|
|
|
!llvm.module.flags = !{!0}
|
|
!opencl.ocl.version = !{!1}
|
|
!opencl.spir.version = !{!1}
|
|
!llvm.ident = !{!2}
|
|
|
|
!0 = !{i32 1, !"wchar_size", i32 4}
|
|
!1 = !{i32 2, i32 0}
|
|
!2 = !{!"clang version 14.0.0"}
|
|
!3 = !{!4, !4, i64 0}
|
|
!4 = !{!"int", !5, i64 0}
|
|
!5 = !{!"omnipotent char", !6, i64 0}
|
|
!6 = !{!"Simple C/C++ TBAA"}
|
|
!7 = !{!5, !5, i64 0}
|