derek.holloway
7502bf64a4
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16 lines
766 B
Plaintext
16 lines
766 B
Plaintext
= OVERVIEW =
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The Synacor Challenge is a fun programming exercise with a number of puzzles
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built into it. You can find more details about it here:
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https://challenge.synacor.com/
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The first puzzle is writing an interpreter for their custom ISA. This is a
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simulator for that custom CPU. The CPU is quite basic: it's 16-bit with only
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8 registers and a limited set of instructions. This means the port will never
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grow new features. See README.arch-spec for more details.
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Implementing it here ends up being quite useful: it acts as a simple constrained
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"real world" example for people who want to implement a new simulator for their
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own architecture. We demonstrate all the basic fundamentals (registers, memory,
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branches, and tracing) that all ports should have.
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