derek.holloway
7502bf64a4
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99 lines
6.4 KiB
Common Lisp
99 lines
6.4 KiB
Common Lisp
/*===--------------------------------------------------------------------------
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* ROCm Device Libraries
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*
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* This file is distributed under the University of Illinois Open Source
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* License. See LICENSE.TXT for details.
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*===------------------------------------------------------------------------*/
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#pragma OPENCL EXTENSION cl_khr_subgroups : enable
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__attribute__((overloadable)) void
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mem_fence(cl_mem_fence_flags flags)
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{
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atomic_work_item_fence(flags, memory_order_acq_rel, memory_scope_work_group);
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}
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__attribute__((overloadable)) void
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read_mem_fence(cl_mem_fence_flags flags)
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{
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atomic_work_item_fence(flags, memory_order_acquire, memory_scope_work_group);
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}
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__attribute__((overloadable)) void
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write_mem_fence(cl_mem_fence_flags flags)
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{
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atomic_work_item_fence(flags, memory_order_release, memory_scope_work_group);
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}
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#define IMPL_ATOMIC_WORK_ITEM_FENCE(...) \
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if (order != memory_order_relaxed) { \
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switch (scope) { \
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case memory_scope_work_item: \
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break; \
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case memory_scope_sub_group: \
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switch (order) { \
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case memory_order_relaxed: break; \
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case memory_order_acquire: __builtin_amdgcn_fence(__ATOMIC_ACQUIRE, "wavefront" __VA_ARGS__); break;\
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case memory_order_release: __builtin_amdgcn_fence(__ATOMIC_RELEASE, "wavefront" __VA_ARGS__); break;\
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case memory_order_acq_rel: __builtin_amdgcn_fence(__ATOMIC_ACQ_REL, "wavefront" __VA_ARGS__); break;\
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case memory_order_seq_cst: __builtin_amdgcn_fence(__ATOMIC_SEQ_CST, "wavefront" __VA_ARGS__); break;\
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} \
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break; \
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case memory_scope_work_group: \
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switch (order) { \
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case memory_order_relaxed: break; \
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case memory_order_acquire: __builtin_amdgcn_fence(__ATOMIC_ACQUIRE, "workgroup" __VA_ARGS__); break;\
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case memory_order_release: __builtin_amdgcn_fence(__ATOMIC_RELEASE, "workgroup" __VA_ARGS__); break;\
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case memory_order_acq_rel: __builtin_amdgcn_fence(__ATOMIC_ACQ_REL, "workgroup" __VA_ARGS__); break;\
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case memory_order_seq_cst: __builtin_amdgcn_fence(__ATOMIC_SEQ_CST, "workgroup" __VA_ARGS__); break;\
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} \
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break; \
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case memory_scope_device: \
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switch (order) { \
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case memory_order_relaxed: break; \
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case memory_order_acquire: __builtin_amdgcn_fence(__ATOMIC_ACQUIRE, "agent" __VA_ARGS__); break; \
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case memory_order_release: __builtin_amdgcn_fence(__ATOMIC_RELEASE, "agent" __VA_ARGS__); break; \
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case memory_order_acq_rel: __builtin_amdgcn_fence(__ATOMIC_ACQ_REL, "agent" __VA_ARGS__); break; \
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case memory_order_seq_cst: __builtin_amdgcn_fence(__ATOMIC_SEQ_CST, "agent" __VA_ARGS__); break; \
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} \
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break; \
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case memory_scope_all_svm_devices: \
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switch (order) { \
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case memory_order_relaxed: break; \
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case memory_order_acquire: __builtin_amdgcn_fence(__ATOMIC_ACQUIRE, "" __VA_ARGS__); break; \
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case memory_order_release: __builtin_amdgcn_fence(__ATOMIC_RELEASE, "" __VA_ARGS__); break; \
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case memory_order_acq_rel: __builtin_amdgcn_fence(__ATOMIC_ACQ_REL, "" __VA_ARGS__); break; \
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case memory_order_seq_cst: __builtin_amdgcn_fence(__ATOMIC_SEQ_CST, "" __VA_ARGS__); break; \
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} \
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break; \
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} \
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}
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__attribute__((overloadable)) void
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atomic_work_item_fence(cl_mem_fence_flags flags, memory_order order, memory_scope scope)
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{
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// The AS to fence (if only global or local is needed) is encoded in
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// metadata attached to the fence instruction by the builtin.
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// That metadata may be dropped in some cases, if that happens then
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// we are tying global-happens-before and local-happens-before together
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// as does HSA
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if (flags) {
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// global or image is set, but not local -> fence only global memory.
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if ((flags & CLK_LOCAL_MEM_FENCE) == 0) {
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IMPL_ATOMIC_WORK_ITEM_FENCE(, "global");
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return;
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}
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// only local is set
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if (flags == CLK_LOCAL_MEM_FENCE) {
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IMPL_ATOMIC_WORK_ITEM_FENCE(, "local");
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return;
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}
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// all flags are set, same as if none are set -> fence all.
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}
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IMPL_ATOMIC_WORK_ITEM_FENCE();
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}
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