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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-coalescing -run-pass=register-coalescer -verify-machineinstrs -o - %s | FileCheck %s
# Bug 39602: Avoid "Couldn't join subrange" error when clearing valid
# lanes on an implicit_def that later cannot be erased.
---
name: lost_valid_lanes_maybe_erasable_implicit_def
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: lost_valid_lanes_maybe_erasable_implicit_def
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: undef [[DEF:%[0-9]+]].sub1:sreg_64 = IMPLICIT_DEF
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: [[DEF:%[0-9]+]].sub0:sreg_64 = S_MOV_B32 0
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY [[DEF]]
; CHECK-NEXT: dead [[DEF:%[0-9]+]].sub1:sreg_64 = COPY [[DEF]].sub0
; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]].sub1
bb.0:
successors: %bb.1
undef %0.sub1:sreg_64 = IMPLICIT_DEF
bb.1:
%0.sub0:sreg_64 = S_MOV_B32 0
%1:sreg_64 = COPY %0:sreg_64
dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
S_ENDPGM 0, implicit %1.sub1:sreg_64
...
---
# Same as previous, except with a real value instead of
# IMPLICIT_DEF. These should both be handled the same way.
name: lost_valid_lanes_real_value
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: lost_valid_lanes_real_value
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 -1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = S_MOV_B32 0
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY [[S_MOV_B32_]]
; CHECK-NEXT: dead [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = COPY [[S_MOV_B32_]].sub0
; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]].sub1
bb.0:
successors: %bb.1
undef %0.sub1:sreg_64 = S_MOV_B32 -1
bb.1:
%0.sub0:sreg_64 = S_MOV_B32 0
%1:sreg_64 = COPY %0:sreg_64
dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
S_ENDPGM 0, implicit %1.sub1:sreg_64
...