derek.holloway
7502bf64a4
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345 lines
16 KiB
YAML
345 lines
16 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
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# RUN: | FileCheck %s --check-prefixes=RV64I
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# RUN: llc -mtriple=riscv64 -mattr=+zbb -run-pass=legalizer %s -o - \
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# RUN: | FileCheck %s --check-prefixes=RV64ZBB
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---
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name: abds_i8
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body: |
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bb.0.entry:
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liveins: $x10, $x11
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; RV64I-LABEL: name: abds_i8
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; RV64I: liveins: $x10, $x11
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; RV64I-NEXT: {{ $}}
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; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 8
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; RV64I-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 8
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; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT]], [[ASSERT_SEXT1]]
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; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT1]], [[ASSERT_SEXT]]
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; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASSERT_SEXT]](s64), [[ASSERT_SEXT1]]
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; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SUB]](s64)
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; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SUB1]](s64)
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; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]
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; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)
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; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)
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; RV64I-NEXT: PseudoRET implicit $x10
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;
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; RV64ZBB-LABEL: name: abds_i8
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; RV64ZBB: liveins: $x10, $x11
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; RV64ZBB-NEXT: {{ $}}
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; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64ZBB-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 8
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; RV64ZBB-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 8
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; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[ASSERT_SEXT]], [[ASSERT_SEXT1]]
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; RV64ZBB-NEXT: [[SMIN:%[0-9]+]]:_(s64) = G_SMIN [[ASSERT_SEXT]], [[ASSERT_SEXT1]]
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; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[SMAX]], [[SMIN]]
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; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)
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; RV64ZBB-NEXT: PseudoRET implicit $x10
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%1:_(s64) = COPY $x10
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%2:_(s64) = COPY $x11
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%3:_(s64) = G_ASSERT_SEXT %1, 8
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%4:_(s64) = G_ASSERT_SEXT %2, 8
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%5:_(s8) = G_TRUNC %3(s64)
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%6:_(s8) = G_TRUNC %4(s64)
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%7:_(s8) = G_ABDS %5, %6
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%8:_(s64) = G_ANYEXT %7(s8)
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$x10 = COPY %8(s64)
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PseudoRET implicit $x10
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...
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---
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name: abds_i16
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body: |
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bb.0.entry:
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liveins: $x10, $x11
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; RV64I-LABEL: name: abds_i16
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; RV64I: liveins: $x10, $x11
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; RV64I-NEXT: {{ $}}
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; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 16
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; RV64I-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 16
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; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT]], [[ASSERT_SEXT1]]
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; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT1]], [[ASSERT_SEXT]]
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; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASSERT_SEXT]](s64), [[ASSERT_SEXT1]]
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; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SUB]](s64)
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; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SUB1]](s64)
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; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]
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; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)
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; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)
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; RV64I-NEXT: PseudoRET implicit $x10
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;
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; RV64ZBB-LABEL: name: abds_i16
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; RV64ZBB: liveins: $x10, $x11
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; RV64ZBB-NEXT: {{ $}}
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; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64ZBB-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 16
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; RV64ZBB-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 16
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; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[ASSERT_SEXT]], [[ASSERT_SEXT1]]
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; RV64ZBB-NEXT: [[SMIN:%[0-9]+]]:_(s64) = G_SMIN [[ASSERT_SEXT]], [[ASSERT_SEXT1]]
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; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[SMAX]], [[SMIN]]
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; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)
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; RV64ZBB-NEXT: PseudoRET implicit $x10
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%1:_(s64) = COPY $x10
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%2:_(s64) = COPY $x11
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%3:_(s64) = G_ASSERT_SEXT %1, 16
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%4:_(s64) = G_ASSERT_SEXT %2, 16
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%5:_(s16) = G_TRUNC %3(s64)
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%6:_(s16) = G_TRUNC %4(s64)
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%7:_(s16) = G_ABDS %5, %6
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%8:_(s64) = G_ANYEXT %7(s16)
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$x10 = COPY %8(s64)
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PseudoRET implicit $x10
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...
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---
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name: abds_i32
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body: |
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bb.0.entry:
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liveins: $x10, $x11
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; RV64I-LABEL: name: abds_i32
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; RV64I: liveins: $x10, $x11
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; RV64I-NEXT: {{ $}}
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; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32
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; RV64I-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 32
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; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT]], [[ASSERT_SEXT1]]
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; RV64I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB]], 32
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; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SEXT_INREG]](s64)
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; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT1]], [[ASSERT_SEXT]]
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; RV64I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB1]], 32
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; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SEXT_INREG1]](s64)
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; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASSERT_SEXT]](s64), [[ASSERT_SEXT1]]
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; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]
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; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)
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; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)
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; RV64I-NEXT: PseudoRET implicit $x10
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;
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; RV64ZBB-LABEL: name: abds_i32
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; RV64ZBB: liveins: $x10, $x11
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; RV64ZBB-NEXT: {{ $}}
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; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64ZBB-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32
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; RV64ZBB-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 32
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; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[ASSERT_SEXT]], [[ASSERT_SEXT1]]
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; RV64ZBB-NEXT: [[SMIN:%[0-9]+]]:_(s64) = G_SMIN [[ASSERT_SEXT]], [[ASSERT_SEXT1]]
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; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[SMAX]], [[SMIN]]
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; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)
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; RV64ZBB-NEXT: PseudoRET implicit $x10
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%1:_(s64) = COPY $x10
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%2:_(s64) = COPY $x11
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%3:_(s64) = G_ASSERT_SEXT %1, 32
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%4:_(s64) = G_ASSERT_SEXT %2, 32
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%5:_(s32) = G_TRUNC %3(s64)
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%6:_(s32) = G_TRUNC %4(s64)
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%7:_(s32) = G_ABDS %5, %6
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%8:_(s64) = G_ANYEXT %7(s32)
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$x10 = COPY %8(s64)
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PseudoRET implicit $x10
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...
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---
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name: abds_i64
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body: |
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bb.0.entry:
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; RV64I-LABEL: name: abds_i64
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; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
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; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[COPY1]], [[COPY]]
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; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[COPY]](s64), [[COPY1]]
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; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s64), [[SUB]], [[SUB1]]
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; RV64I-NEXT: $x10 = COPY [[SELECT]](s64)
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; RV64I-NEXT: PseudoRET implicit $x10
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;
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; RV64ZBB-LABEL: name: abds_i64
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; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[COPY]], [[COPY1]]
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; RV64ZBB-NEXT: [[SMIN:%[0-9]+]]:_(s64) = G_SMIN [[COPY]], [[COPY1]]
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; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[SMAX]], [[SMIN]]
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; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)
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; RV64ZBB-NEXT: PseudoRET implicit $x10
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%1:_(s64) = COPY $x10
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%2:_(s64) = COPY $x11
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%3:_(s64) = G_ABDS %1, %2
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$x10 = COPY %3(s64)
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PseudoRET implicit $x10
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...
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---
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name: abdu_i8
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body: |
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bb.0.entry:
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liveins: $x10, $x11
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; RV64I-LABEL: name: abdu_i8
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; RV64I: liveins: $x10, $x11
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; RV64I-NEXT: {{ $}}
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; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64I-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 8
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; RV64I-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 8
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; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]
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; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT1]], [[ASSERT_ZEXT]]
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; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[ASSERT_ZEXT]](s64), [[ASSERT_ZEXT1]]
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; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SUB]](s64)
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; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SUB1]](s64)
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; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]
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; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)
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; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)
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; RV64I-NEXT: PseudoRET implicit $x10
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;
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; RV64ZBB-LABEL: name: abdu_i8
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; RV64ZBB: liveins: $x10, $x11
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; RV64ZBB-NEXT: {{ $}}
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; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64ZBB-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 8
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; RV64ZBB-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 8
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; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]
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; RV64ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s64) = G_UMIN [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]
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; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[UMAX]], [[UMIN]]
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; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)
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; RV64ZBB-NEXT: PseudoRET implicit $x10
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%1:_(s64) = COPY $x10
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%2:_(s64) = COPY $x11
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%3:_(s64) = G_ASSERT_ZEXT %1, 8
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%4:_(s64) = G_ASSERT_ZEXT %2, 8
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%5:_(s8) = G_TRUNC %3(s64)
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%6:_(s8) = G_TRUNC %4(s64)
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%7:_(s8) = G_ABDU %5, %6
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%8:_(s64) = G_ANYEXT %7(s8)
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$x10 = COPY %8(s64)
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PseudoRET implicit $x10
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...
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---
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name: abdu_i16
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body: |
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bb.0.entry:
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liveins: $x10, $x11
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; RV64I-LABEL: name: abdu_i16
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; RV64I: liveins: $x10, $x11
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; RV64I-NEXT: {{ $}}
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; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64I-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 16
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; RV64I-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 16
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; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]
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; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT1]], [[ASSERT_ZEXT]]
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; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[ASSERT_ZEXT]](s64), [[ASSERT_ZEXT1]]
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; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SUB]](s64)
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; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SUB1]](s64)
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; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]
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; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)
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; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)
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; RV64I-NEXT: PseudoRET implicit $x10
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;
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; RV64ZBB-LABEL: name: abdu_i16
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; RV64ZBB: liveins: $x10, $x11
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; RV64ZBB-NEXT: {{ $}}
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; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; RV64ZBB-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 16
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; RV64ZBB-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 16
|
|
; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]
|
|
; RV64ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s64) = G_UMIN [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]
|
|
; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[UMAX]], [[UMIN]]
|
|
; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)
|
|
; RV64ZBB-NEXT: PseudoRET implicit $x10
|
|
%1:_(s64) = COPY $x10
|
|
%2:_(s64) = COPY $x11
|
|
%3:_(s64) = G_ASSERT_ZEXT %1, 16
|
|
%4:_(s64) = G_ASSERT_ZEXT %2, 16
|
|
%5:_(s16) = G_TRUNC %3(s64)
|
|
%6:_(s16) = G_TRUNC %4(s64)
|
|
%7:_(s16) = G_ABDU %5, %6
|
|
%8:_(s64) = G_ANYEXT %7(s16)
|
|
$x10 = COPY %8(s64)
|
|
PseudoRET implicit $x10
|
|
...
|
|
---
|
|
name: abdu_i32
|
|
body: |
|
|
bb.0.entry:
|
|
liveins: $x10, $x11
|
|
|
|
; RV64I-LABEL: name: abdu_i32
|
|
; RV64I: liveins: $x10, $x11
|
|
; RV64I-NEXT: {{ $}}
|
|
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
|
|
; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
|
|
; RV64I-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 32
|
|
; RV64I-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 32
|
|
; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]
|
|
; RV64I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB]], 32
|
|
; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SEXT_INREG]](s64)
|
|
; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT1]], [[ASSERT_ZEXT]]
|
|
; RV64I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB1]], 32
|
|
; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SEXT_INREG1]](s64)
|
|
; RV64I-NEXT: [[SEXT_INREG2:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ASSERT_ZEXT]], 32
|
|
; RV64I-NEXT: [[SEXT_INREG3:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ASSERT_ZEXT1]], 32
|
|
; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[SEXT_INREG2]](s64), [[SEXT_INREG3]]
|
|
; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]
|
|
; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)
|
|
; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)
|
|
; RV64I-NEXT: PseudoRET implicit $x10
|
|
;
|
|
; RV64ZBB-LABEL: name: abdu_i32
|
|
; RV64ZBB: liveins: $x10, $x11
|
|
; RV64ZBB-NEXT: {{ $}}
|
|
; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
|
|
; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
|
|
; RV64ZBB-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 32
|
|
; RV64ZBB-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 32
|
|
; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]
|
|
; RV64ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s64) = G_UMIN [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]
|
|
; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[UMAX]], [[UMIN]]
|
|
; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)
|
|
; RV64ZBB-NEXT: PseudoRET implicit $x10
|
|
%1:_(s64) = COPY $x10
|
|
%2:_(s64) = COPY $x11
|
|
%3:_(s64) = G_ASSERT_ZEXT %1, 32
|
|
%4:_(s64) = G_ASSERT_ZEXT %2, 32
|
|
%5:_(s32) = G_TRUNC %3(s64)
|
|
%6:_(s32) = G_TRUNC %4(s64)
|
|
%7:_(s32) = G_ABDU %5, %6
|
|
%8:_(s64) = G_ANYEXT %7(s32)
|
|
$x10 = COPY %8(s64)
|
|
PseudoRET implicit $x10
|
|
...
|
|
---
|
|
name: abdu_i64
|
|
body: |
|
|
bb.0.entry:
|
|
|
|
; RV64I-LABEL: name: abdu_i64
|
|
; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
|
|
; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
|
|
; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
|
|
; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[COPY1]], [[COPY]]
|
|
; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[COPY]](s64), [[COPY1]]
|
|
; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s64), [[SUB]], [[SUB1]]
|
|
; RV64I-NEXT: $x10 = COPY [[SELECT]](s64)
|
|
; RV64I-NEXT: PseudoRET implicit $x10
|
|
;
|
|
; RV64ZBB-LABEL: name: abdu_i64
|
|
; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
|
|
; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
|
|
; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[COPY]], [[COPY1]]
|
|
; RV64ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s64) = G_UMIN [[COPY]], [[COPY1]]
|
|
; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[UMAX]], [[UMIN]]
|
|
; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)
|
|
; RV64ZBB-NEXT: PseudoRET implicit $x10
|
|
%1:_(s64) = COPY $x10
|
|
%2:_(s64) = COPY $x11
|
|
%3:_(s64) = G_ABDU %1, %2
|
|
$x10 = COPY %3(s64)
|
|
PseudoRET implicit $x10
|
|
...
|