derek.holloway
7502bf64a4
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65 lines
3.7 KiB
LLVM
65 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -mattr=+v -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s
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; (fadd (fmul x, y), z)) -> (fma x, y, z)
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define <vscale x 1 x double> @fma(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: fma:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; CHECK-NEXT: vfmadd.vv v8, v9, v10
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; CHECK-NEXT: ret
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%1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x i1> %m, i32 %vl)
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%2 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %1, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 %vl)
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ret <vscale x 1 x double> %2
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}
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; (fadd z, (fmul x, y))) -> (fma x, y, z)
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define <vscale x 1 x double> @fma_commute(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: fma_commute:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; CHECK-NEXT: vfmadd.vv v8, v9, v10
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; CHECK-NEXT: ret
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%1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x i1> %m, i32 %vl)
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%2 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %z, <vscale x 1 x double> %1, <vscale x 1 x i1> %m, i32 %vl)
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ret <vscale x 1 x double> %2
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}
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; Test operand with true mask
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define <vscale x 1 x double> @fma_true(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: fma_true:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; CHECK-NEXT: vfmadd.vv v8, v9, v10
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; CHECK-NEXT: ret
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%1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x i1> splat (i1 true), i32 %vl)
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%2 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %1, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 %vl)
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ret <vscale x 1 x double> %2
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}
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; Test operand with normal opcode.
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define <vscale x 1 x double> @fma_nonvp(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: fma_nonvp:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; CHECK-NEXT: vfmadd.vv v8, v9, v10
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; CHECK-NEXT: ret
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%1 = fmul fast <vscale x 1 x double> %x, %y
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%2 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %1, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 %vl)
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ret <vscale x 1 x double> %2
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}
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define <vscale x 1 x double> @fma_reassociate(<vscale x 1 x double> %a, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x double> %d, <vscale x 1 x double> %e, <vscale x 1 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: fma_reassociate:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; CHECK-NEXT: vfmadd.vv v10, v11, v12
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; CHECK-NEXT: vfmadd.vv v8, v9, v10
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; CHECK-NEXT: ret
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%1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %vl)
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%2 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x double> %d, <vscale x 1 x i1> %m, i32 %vl)
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%3 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %1, <vscale x 1 x double> %2, <vscale x 1 x i1> %m, i32 %vl)
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%4 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %3, <vscale x 1 x double> %e, <vscale x 1 x i1> %m, i32 %vl)
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ret <vscale x 1 x double> %4
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}
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