derek.holloway
7502bf64a4
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19 lines
996 B
LLVM
19 lines
996 B
LLVM
; REQUIRES: asserts
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; RUN: llc < %s -mtriple=ve -mattr=+vpu -o /dev/null -debug-only=selectiondag 2>&1 | FileCheck %s
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;; Check that a vector register is not bitcasted or assigned to v512* type
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;; like below. Because, inline asm assigns registers by not a type but
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;; register class.
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;;
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;; t26: ch,glue = inlineasm t25, TargetExternalSymbol:i64'vld $0, $2, $1', MDNode:ch<null>, TargetConstant:i64<1>, TargetConstant:i32<589834>, Register:v512i32 %4, TargetConstant:i32<262153>, Register:i64 %5, TargetConstant:i32<262153>, Register:i64 %6, t25:1
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;; t28: v512i32 = bitcast t27
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define void @vldvst(ptr %p, i64 %i) nounwind {
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; CHECK-NOT: v512
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%lvl = tail call i64 asm sideeffect "lea $0, 256", "=r"() nounwind
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tail call void asm sideeffect "lvl $0", "r"(i64 %lvl) nounwind
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%1 = tail call <256 x double> asm sideeffect "vld $0, $2, $1", "=v,r,r"(ptr %p, i64 %i) nounwind
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tail call void asm sideeffect "vst $0, $2, $1", "v,r,r"(<256 x double> %1, ptr %p, i64 %i) nounwind
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ret void
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}
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