derek.holloway
7502bf64a4
CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
1300 lines
45 KiB
Plaintext
1300 lines
45 KiB
Plaintext
# RUN: llvm-mc --disassemble %s -triple=i386 | FileCheck %s --check-prefixes=ATT
|
|
# RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
|
|
|
|
# ATT: vcvtbf162ibs %xmm3, %xmm2
|
|
# INTEL: vcvtbf162ibs xmm2, xmm3
|
|
0x62,0xf5,0x7f,0x08,0x69,0xd3
|
|
|
|
# ATT: vcvtbf162ibs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvtbf162ibs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7f,0x0f,0x69,0xd3
|
|
|
|
# ATT: vcvtbf162ibs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162ibs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7f,0x8f,0x69,0xd3
|
|
|
|
# ATT: vcvtbf162ibs %zmm3, %zmm2
|
|
# INTEL: vcvtbf162ibs zmm2, zmm3
|
|
0x62,0xf5,0x7f,0x48,0x69,0xd3
|
|
|
|
# ATT: vcvtbf162ibs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvtbf162ibs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7f,0x4f,0x69,0xd3
|
|
|
|
# ATT: vcvtbf162ibs %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162ibs zmm2 {k7} {z}, zmm3
|
|
0x62,0xf5,0x7f,0xcf,0x69,0xd3
|
|
|
|
# ATT: vcvtbf162ibs %ymm3, %ymm2
|
|
# INTEL: vcvtbf162ibs ymm2, ymm3
|
|
0x62,0xf5,0x7f,0x28,0x69,0xd3
|
|
|
|
# ATT: vcvtbf162ibs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvtbf162ibs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7f,0x2f,0x69,0xd3
|
|
|
|
# ATT: vcvtbf162ibs %ymm3, %ymm2 {%k7} {z}
|
|
# INTEL: vcvtbf162ibs ymm2 {k7} {z}, ymm3
|
|
0x62,0xf5,0x7f,0xaf,0x69,0xd3
|
|
|
|
# ATT: vcvtbf162ibs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvtbf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtbf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvtbf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtbf162ibs (%eax){1to8}, %xmm2
|
|
# INTEL: vcvtbf162ibs xmm2, word ptr [eax]{1to8}
|
|
0x62,0xf5,0x7f,0x18,0x69,0x10
|
|
|
|
# ATT: vcvtbf162ibs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvtbf162ibs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7f,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvtbf162ibs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7f,0x8f,0x69,0x51,0x7f
|
|
|
|
# ATT: vcvtbf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
|
|
0x62,0xf5,0x7f,0x9f,0x69,0x52,0x80
|
|
|
|
# ATT: vcvtbf162ibs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvtbf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtbf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvtbf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtbf162ibs (%eax){1to16}, %ymm2
|
|
# INTEL: vcvtbf162ibs ymm2, word ptr [eax]{1to16}
|
|
0x62,0xf5,0x7f,0x38,0x69,0x10
|
|
|
|
# ATT: vcvtbf162ibs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvtbf162ibs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7f,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvtbf162ibs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvtbf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7f,0xaf,0x69,0x51,0x7f
|
|
|
|
# ATT: vcvtbf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvtbf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
|
|
0x62,0xf5,0x7f,0xbf,0x69,0x52,0x80
|
|
|
|
# ATT: vcvtbf162ibs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvtbf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtbf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvtbf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtbf162ibs (%eax){1to32}, %zmm2
|
|
# INTEL: vcvtbf162ibs zmm2, word ptr [eax]{1to32}
|
|
0x62,0xf5,0x7f,0x58,0x69,0x10
|
|
|
|
# ATT: vcvtbf162ibs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvtbf162ibs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7f,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvtbf162ibs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7f,0xcf,0x69,0x51,0x7f
|
|
|
|
# ATT: vcvtbf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
|
|
0x62,0xf5,0x7f,0xdf,0x69,0x52,0x80
|
|
|
|
# ATT: vcvtbf162iubs %xmm3, %xmm2
|
|
# INTEL: vcvtbf162iubs xmm2, xmm3
|
|
0x62,0xf5,0x7f,0x08,0x6b,0xd3
|
|
|
|
# ATT: vcvtbf162iubs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvtbf162iubs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7f,0x0f,0x6b,0xd3
|
|
|
|
# ATT: vcvtbf162iubs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162iubs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7f,0x8f,0x6b,0xd3
|
|
|
|
# ATT: vcvtbf162iubs %zmm3, %zmm2
|
|
# INTEL: vcvtbf162iubs zmm2, zmm3
|
|
0x62,0xf5,0x7f,0x48,0x6b,0xd3
|
|
|
|
# ATT: vcvtbf162iubs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvtbf162iubs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7f,0x4f,0x6b,0xd3
|
|
|
|
# ATT: vcvtbf162iubs %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162iubs zmm2 {k7} {z}, zmm3
|
|
0x62,0xf5,0x7f,0xcf,0x6b,0xd3
|
|
|
|
# ATT: vcvtbf162iubs %ymm3, %ymm2
|
|
# INTEL: vcvtbf162iubs ymm2, ymm3
|
|
0x62,0xf5,0x7f,0x28,0x6b,0xd3
|
|
|
|
# ATT: vcvtbf162iubs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvtbf162iubs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7f,0x2f,0x6b,0xd3
|
|
|
|
# ATT: vcvtbf162iubs %ymm3, %ymm2 {%k7} {z}
|
|
# INTEL: vcvtbf162iubs ymm2 {k7} {z}, ymm3
|
|
0x62,0xf5,0x7f,0xaf,0x6b,0xd3
|
|
|
|
# ATT: vcvtbf162iubs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvtbf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtbf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvtbf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtbf162iubs (%eax){1to8}, %xmm2
|
|
# INTEL: vcvtbf162iubs xmm2, word ptr [eax]{1to8}
|
|
0x62,0xf5,0x7f,0x18,0x6b,0x10
|
|
|
|
# ATT: vcvtbf162iubs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvtbf162iubs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7f,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvtbf162iubs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7f,0x8f,0x6b,0x51,0x7f
|
|
|
|
# ATT: vcvtbf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
|
|
0x62,0xf5,0x7f,0x9f,0x6b,0x52,0x80
|
|
|
|
# ATT: vcvtbf162iubs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvtbf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtbf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvtbf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtbf162iubs (%eax){1to16}, %ymm2
|
|
# INTEL: vcvtbf162iubs ymm2, word ptr [eax]{1to16}
|
|
0x62,0xf5,0x7f,0x38,0x6b,0x10
|
|
|
|
# ATT: vcvtbf162iubs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvtbf162iubs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7f,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvtbf162iubs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvtbf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7f,0xaf,0x6b,0x51,0x7f
|
|
|
|
# ATT: vcvtbf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvtbf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
|
|
0x62,0xf5,0x7f,0xbf,0x6b,0x52,0x80
|
|
|
|
# ATT: vcvtbf162iubs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvtbf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtbf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvtbf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtbf162iubs (%eax){1to32}, %zmm2
|
|
# INTEL: vcvtbf162iubs zmm2, word ptr [eax]{1to32}
|
|
0x62,0xf5,0x7f,0x58,0x6b,0x10
|
|
|
|
# ATT: vcvtbf162iubs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvtbf162iubs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7f,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvtbf162iubs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7f,0xcf,0x6b,0x51,0x7f
|
|
|
|
# ATT: vcvtbf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtbf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
|
|
0x62,0xf5,0x7f,0xdf,0x6b,0x52,0x80
|
|
|
|
# ATT: vcvtph2ibs %xmm3, %xmm2
|
|
# INTEL: vcvtph2ibs xmm2, xmm3
|
|
0x62,0xf5,0x7c,0x08,0x69,0xd3
|
|
|
|
# ATT: vcvtph2ibs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvtph2ibs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7c,0x0f,0x69,0xd3
|
|
|
|
# ATT: vcvtph2ibs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtph2ibs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7c,0x8f,0x69,0xd3
|
|
|
|
# ATT: vcvtph2ibs %zmm3, %zmm2
|
|
# INTEL: vcvtph2ibs zmm2, zmm3
|
|
0x62,0xf5,0x7c,0x48,0x69,0xd3
|
|
|
|
# ATT: vcvtph2ibs {rn-sae}, %zmm3, %zmm2
|
|
# INTEL: vcvtph2ibs zmm2, zmm3, {rn-sae}
|
|
0x62,0xf5,0x7c,0x18,0x69,0xd3
|
|
|
|
# ATT: vcvtph2ibs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvtph2ibs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7c,0x4f,0x69,0xd3
|
|
|
|
# ATT: vcvtph2ibs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtph2ibs zmm2 {k7} {z}, zmm3, {rz-sae}
|
|
0x62,0xf5,0x7c,0xff,0x69,0xd3
|
|
|
|
# ATT: vcvtph2ibs %ymm3, %ymm2
|
|
# INTEL: vcvtph2ibs ymm2, ymm3
|
|
0x62,0xf5,0x7c,0x28,0x69,0xd3
|
|
|
|
# ATT: vcvtph2ibs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvtph2ibs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7c,0x2f,0x69,0xd3
|
|
|
|
# ATT: vcvtph2ibs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvtph2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtph2ibs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvtph2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtph2ibs (%eax){1to8}, %xmm2
|
|
# INTEL: vcvtph2ibs xmm2, word ptr [eax]{1to8}
|
|
0x62,0xf5,0x7c,0x18,0x69,0x10
|
|
|
|
# ATT: vcvtph2ibs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvtph2ibs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7c,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvtph2ibs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvtph2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7c,0x8f,0x69,0x51,0x7f
|
|
|
|
# ATT: vcvtph2ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtph2ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
|
|
0x62,0xf5,0x7c,0x9f,0x69,0x52,0x80
|
|
|
|
# ATT: vcvtph2ibs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvtph2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtph2ibs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvtph2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtph2ibs (%eax){1to16}, %ymm2
|
|
# INTEL: vcvtph2ibs ymm2, word ptr [eax]{1to16}
|
|
0x62,0xf5,0x7c,0x38,0x69,0x10
|
|
|
|
# ATT: vcvtph2ibs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvtph2ibs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7c,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvtph2ibs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvtph2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7c,0xaf,0x69,0x51,0x7f
|
|
|
|
# ATT: vcvtph2ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvtph2ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
|
|
0x62,0xf5,0x7c,0xbf,0x69,0x52,0x80
|
|
|
|
# ATT: vcvtph2ibs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvtph2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtph2ibs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvtph2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtph2ibs (%eax){1to32}, %zmm2
|
|
# INTEL: vcvtph2ibs zmm2, word ptr [eax]{1to32}
|
|
0x62,0xf5,0x7c,0x58,0x69,0x10
|
|
|
|
# ATT: vcvtph2ibs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvtph2ibs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7c,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvtph2ibs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvtph2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7c,0xcf,0x69,0x51,0x7f
|
|
|
|
# ATT: vcvtph2ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtph2ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
|
|
0x62,0xf5,0x7c,0xdf,0x69,0x52,0x80
|
|
|
|
# ATT: vcvtph2iubs %xmm3, %xmm2
|
|
# INTEL: vcvtph2iubs xmm2, xmm3
|
|
0x62,0xf5,0x7c,0x08,0x6b,0xd3
|
|
|
|
# ATT: vcvtph2iubs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvtph2iubs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7c,0x0f,0x6b,0xd3
|
|
|
|
# ATT: vcvtph2iubs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtph2iubs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7c,0x8f,0x6b,0xd3
|
|
|
|
# ATT: vcvtph2iubs %zmm3, %zmm2
|
|
# INTEL: vcvtph2iubs zmm2, zmm3
|
|
0x62,0xf5,0x7c,0x48,0x6b,0xd3
|
|
|
|
# ATT: vcvtph2iubs {rn-sae}, %zmm3, %zmm2
|
|
# INTEL: vcvtph2iubs zmm2, zmm3, {rn-sae}
|
|
0x62,0xf5,0x7c,0x18,0x6b,0xd3
|
|
|
|
# ATT: vcvtph2iubs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvtph2iubs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7c,0x4f,0x6b,0xd3
|
|
|
|
# ATT: vcvtph2iubs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtph2iubs zmm2 {k7} {z}, zmm3, {rz-sae}
|
|
0x62,0xf5,0x7c,0xff,0x6b,0xd3
|
|
|
|
# ATT: vcvtph2iubs %ymm3, %ymm2
|
|
# INTEL: vcvtph2iubs ymm2, ymm3
|
|
0x62,0xf5,0x7c,0x28,0x6b,0xd3
|
|
|
|
# ATT: vcvtph2iubs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvtph2iubs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7c,0x2f,0x6b,0xd3
|
|
|
|
# ATT: vcvtph2iubs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvtph2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtph2iubs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvtph2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtph2iubs (%eax){1to8}, %xmm2
|
|
# INTEL: vcvtph2iubs xmm2, word ptr [eax]{1to8}
|
|
0x62,0xf5,0x7c,0x18,0x6b,0x10
|
|
|
|
# ATT: vcvtph2iubs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvtph2iubs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7c,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvtph2iubs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvtph2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7c,0x8f,0x6b,0x51,0x7f
|
|
|
|
# ATT: vcvtph2iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtph2iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
|
|
0x62,0xf5,0x7c,0x9f,0x6b,0x52,0x80
|
|
|
|
# ATT: vcvtph2iubs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvtph2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtph2iubs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvtph2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtph2iubs (%eax){1to16}, %ymm2
|
|
# INTEL: vcvtph2iubs ymm2, word ptr [eax]{1to16}
|
|
0x62,0xf5,0x7c,0x38,0x6b,0x10
|
|
|
|
# ATT: vcvtph2iubs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvtph2iubs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7c,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvtph2iubs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvtph2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7c,0xaf,0x6b,0x51,0x7f
|
|
|
|
# ATT: vcvtph2iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvtph2iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
|
|
0x62,0xf5,0x7c,0xbf,0x6b,0x52,0x80
|
|
|
|
# ATT: vcvtph2iubs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvtph2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtph2iubs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvtph2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtph2iubs (%eax){1to32}, %zmm2
|
|
# INTEL: vcvtph2iubs zmm2, word ptr [eax]{1to32}
|
|
0x62,0xf5,0x7c,0x58,0x6b,0x10
|
|
|
|
# ATT: vcvtph2iubs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvtph2iubs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7c,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvtph2iubs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvtph2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7c,0xcf,0x6b,0x51,0x7f
|
|
|
|
# ATT: vcvtph2iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtph2iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
|
|
0x62,0xf5,0x7c,0xdf,0x6b,0x52,0x80
|
|
|
|
# ATT: vcvtps2ibs %xmm3, %xmm2
|
|
# INTEL: vcvtps2ibs xmm2, xmm3
|
|
0x62,0xf5,0x7d,0x08,0x69,0xd3
|
|
|
|
# ATT: vcvtps2ibs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvtps2ibs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7d,0x0f,0x69,0xd3
|
|
|
|
# ATT: vcvtps2ibs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtps2ibs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7d,0x8f,0x69,0xd3
|
|
|
|
# ATT: vcvtps2ibs %zmm3, %zmm2
|
|
# INTEL: vcvtps2ibs zmm2, zmm3
|
|
0x62,0xf5,0x7d,0x48,0x69,0xd3
|
|
|
|
# ATT: vcvtps2ibs {rn-sae}, %zmm3, %zmm2
|
|
# INTEL: vcvtps2ibs zmm2, zmm3, {rn-sae}
|
|
0x62,0xf5,0x7d,0x18,0x69,0xd3
|
|
|
|
# ATT: vcvtps2ibs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvtps2ibs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7d,0x4f,0x69,0xd3
|
|
|
|
# ATT: vcvtps2ibs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtps2ibs zmm2 {k7} {z}, zmm3, {rz-sae}
|
|
0x62,0xf5,0x7d,0xff,0x69,0xd3
|
|
|
|
# ATT: vcvtps2ibs %ymm3, %ymm2
|
|
# INTEL: vcvtps2ibs ymm2, ymm3
|
|
0x62,0xf5,0x7d,0x28,0x69,0xd3
|
|
|
|
# ATT: vcvtps2ibs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvtps2ibs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7d,0x2f,0x69,0xd3
|
|
|
|
# ATT: vcvtps2ibs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvtps2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtps2ibs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvtps2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtps2ibs (%eax){1to4}, %xmm2
|
|
# INTEL: vcvtps2ibs xmm2, dword ptr [eax]{1to4}
|
|
0x62,0xf5,0x7d,0x18,0x69,0x10
|
|
|
|
# ATT: vcvtps2ibs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvtps2ibs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7d,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvtps2ibs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvtps2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7d,0x8f,0x69,0x51,0x7f
|
|
|
|
# ATT: vcvtps2ibs -512(%edx){1to4}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtps2ibs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
|
|
0x62,0xf5,0x7d,0x9f,0x69,0x52,0x80
|
|
|
|
# ATT: vcvtps2ibs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvtps2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtps2ibs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvtps2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtps2ibs (%eax){1to8}, %ymm2
|
|
# INTEL: vcvtps2ibs ymm2, dword ptr [eax]{1to8}
|
|
0x62,0xf5,0x7d,0x38,0x69,0x10
|
|
|
|
# ATT: vcvtps2ibs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvtps2ibs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7d,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvtps2ibs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvtps2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7d,0xaf,0x69,0x51,0x7f
|
|
|
|
# ATT: vcvtps2ibs -512(%edx){1to8}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvtps2ibs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
|
|
0x62,0xf5,0x7d,0xbf,0x69,0x52,0x80
|
|
|
|
# ATT: vcvtps2ibs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvtps2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtps2ibs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvtps2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtps2ibs (%eax){1to16}, %zmm2
|
|
# INTEL: vcvtps2ibs zmm2, dword ptr [eax]{1to16}
|
|
0x62,0xf5,0x7d,0x58,0x69,0x10
|
|
|
|
# ATT: vcvtps2ibs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvtps2ibs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7d,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvtps2ibs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvtps2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7d,0xcf,0x69,0x51,0x7f
|
|
|
|
# ATT: vcvtps2ibs -512(%edx){1to16}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtps2ibs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
|
|
0x62,0xf5,0x7d,0xdf,0x69,0x52,0x80
|
|
|
|
# ATT: vcvtps2iubs %xmm3, %xmm2
|
|
# INTEL: vcvtps2iubs xmm2, xmm3
|
|
0x62,0xf5,0x7d,0x08,0x6b,0xd3
|
|
|
|
# ATT: vcvtps2iubs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvtps2iubs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7d,0x0f,0x6b,0xd3
|
|
|
|
# ATT: vcvtps2iubs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtps2iubs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7d,0x8f,0x6b,0xd3
|
|
|
|
# ATT: vcvtps2iubs %zmm3, %zmm2
|
|
# INTEL: vcvtps2iubs zmm2, zmm3
|
|
0x62,0xf5,0x7d,0x48,0x6b,0xd3
|
|
|
|
# ATT: vcvtps2iubs {rn-sae}, %zmm3, %zmm2
|
|
# INTEL: vcvtps2iubs zmm2, zmm3, {rn-sae}
|
|
0x62,0xf5,0x7d,0x18,0x6b,0xd3
|
|
|
|
# ATT: vcvtps2iubs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvtps2iubs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7d,0x4f,0x6b,0xd3
|
|
|
|
# ATT: vcvtps2iubs {rz-sae}, %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtps2iubs zmm2 {k7} {z}, zmm3, {rz-sae}
|
|
0x62,0xf5,0x7d,0xff,0x6b,0xd3
|
|
|
|
# ATT: vcvtps2iubs %ymm3, %ymm2
|
|
# INTEL: vcvtps2iubs ymm2, ymm3
|
|
0x62,0xf5,0x7d,0x28,0x6b,0xd3
|
|
|
|
# ATT: vcvtps2iubs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvtps2iubs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7d,0x2f,0x6b,0xd3
|
|
|
|
# ATT: vcvtps2iubs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvtps2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtps2iubs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvtps2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtps2iubs (%eax){1to4}, %xmm2
|
|
# INTEL: vcvtps2iubs xmm2, dword ptr [eax]{1to4}
|
|
0x62,0xf5,0x7d,0x18,0x6b,0x10
|
|
|
|
# ATT: vcvtps2iubs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvtps2iubs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7d,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvtps2iubs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvtps2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7d,0x8f,0x6b,0x51,0x7f
|
|
|
|
# ATT: vcvtps2iubs -512(%edx){1to4}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvtps2iubs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
|
|
0x62,0xf5,0x7d,0x9f,0x6b,0x52,0x80
|
|
|
|
# ATT: vcvtps2iubs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvtps2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtps2iubs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvtps2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtps2iubs (%eax){1to8}, %ymm2
|
|
# INTEL: vcvtps2iubs ymm2, dword ptr [eax]{1to8}
|
|
0x62,0xf5,0x7d,0x38,0x6b,0x10
|
|
|
|
# ATT: vcvtps2iubs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvtps2iubs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7d,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvtps2iubs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvtps2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7d,0xaf,0x6b,0x51,0x7f
|
|
|
|
# ATT: vcvtps2iubs -512(%edx){1to8}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvtps2iubs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
|
|
0x62,0xf5,0x7d,0xbf,0x6b,0x52,0x80
|
|
|
|
# ATT: vcvtps2iubs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvtps2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvtps2iubs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvtps2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvtps2iubs (%eax){1to16}, %zmm2
|
|
# INTEL: vcvtps2iubs zmm2, dword ptr [eax]{1to16}
|
|
0x62,0xf5,0x7d,0x58,0x6b,0x10
|
|
|
|
# ATT: vcvtps2iubs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvtps2iubs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7d,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvtps2iubs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvtps2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7d,0xcf,0x6b,0x51,0x7f
|
|
|
|
# ATT: vcvtps2iubs -512(%edx){1to16}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvtps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
|
|
0x62,0xf5,0x7d,0xdf,0x6b,0x52,0x80
|
|
|
|
# ATT: vcvttbf162ibs %xmm3, %xmm2
|
|
# INTEL: vcvttbf162ibs xmm2, xmm3
|
|
0x62,0xf5,0x7f,0x08,0x68,0xd3
|
|
|
|
# ATT: vcvttbf162ibs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvttbf162ibs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7f,0x0f,0x68,0xd3
|
|
|
|
# ATT: vcvttbf162ibs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162ibs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7f,0x8f,0x68,0xd3
|
|
|
|
# ATT: vcvttbf162ibs %zmm3, %zmm2
|
|
# INTEL: vcvttbf162ibs zmm2, zmm3
|
|
0x62,0xf5,0x7f,0x48,0x68,0xd3
|
|
|
|
# ATT: vcvttbf162ibs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvttbf162ibs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7f,0x4f,0x68,0xd3
|
|
|
|
# ATT: vcvttbf162ibs %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162ibs zmm2 {k7} {z}, zmm3
|
|
0x62,0xf5,0x7f,0xcf,0x68,0xd3
|
|
|
|
# ATT: vcvttbf162ibs %ymm3, %ymm2
|
|
# INTEL: vcvttbf162ibs ymm2, ymm3
|
|
0x62,0xf5,0x7f,0x28,0x68,0xd3
|
|
|
|
# ATT: vcvttbf162ibs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvttbf162ibs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7f,0x2f,0x68,0xd3
|
|
|
|
# ATT: vcvttbf162ibs %ymm3, %ymm2 {%k7} {z}
|
|
# INTEL: vcvttbf162ibs ymm2 {k7} {z}, ymm3
|
|
0x62,0xf5,0x7f,0xaf,0x68,0xd3
|
|
|
|
# ATT: vcvttbf162ibs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvttbf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttbf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvttbf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttbf162ibs (%eax){1to8}, %xmm2
|
|
# INTEL: vcvttbf162ibs xmm2, word ptr [eax]{1to8}
|
|
0x62,0xf5,0x7f,0x18,0x68,0x10
|
|
|
|
# ATT: vcvttbf162ibs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvttbf162ibs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7f,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvttbf162ibs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7f,0x8f,0x68,0x51,0x7f
|
|
|
|
# ATT: vcvttbf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
|
|
0x62,0xf5,0x7f,0x9f,0x68,0x52,0x80
|
|
|
|
# ATT: vcvttbf162ibs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvttbf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttbf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvttbf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttbf162ibs (%eax){1to16}, %ymm2
|
|
# INTEL: vcvttbf162ibs ymm2, word ptr [eax]{1to16}
|
|
0x62,0xf5,0x7f,0x38,0x68,0x10
|
|
|
|
# ATT: vcvttbf162ibs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvttbf162ibs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7f,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvttbf162ibs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvttbf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7f,0xaf,0x68,0x51,0x7f
|
|
|
|
# ATT: vcvttbf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvttbf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
|
|
0x62,0xf5,0x7f,0xbf,0x68,0x52,0x80
|
|
|
|
# ATT: vcvttbf162ibs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvttbf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttbf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvttbf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttbf162ibs (%eax){1to32}, %zmm2
|
|
# INTEL: vcvttbf162ibs zmm2, word ptr [eax]{1to32}
|
|
0x62,0xf5,0x7f,0x58,0x68,0x10
|
|
|
|
# ATT: vcvttbf162ibs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvttbf162ibs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7f,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvttbf162ibs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7f,0xcf,0x68,0x51,0x7f
|
|
|
|
# ATT: vcvttbf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
|
|
0x62,0xf5,0x7f,0xdf,0x68,0x52,0x80
|
|
|
|
# ATT: vcvttbf162iubs %xmm3, %xmm2
|
|
# INTEL: vcvttbf162iubs xmm2, xmm3
|
|
0x62,0xf5,0x7f,0x08,0x6a,0xd3
|
|
|
|
# ATT: vcvttbf162iubs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvttbf162iubs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7f,0x0f,0x6a,0xd3
|
|
|
|
# ATT: vcvttbf162iubs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162iubs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7f,0x8f,0x6a,0xd3
|
|
|
|
# ATT: vcvttbf162iubs %zmm3, %zmm2
|
|
# INTEL: vcvttbf162iubs zmm2, zmm3
|
|
0x62,0xf5,0x7f,0x48,0x6a,0xd3
|
|
|
|
# ATT: vcvttbf162iubs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvttbf162iubs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7f,0x4f,0x6a,0xd3
|
|
|
|
# ATT: vcvttbf162iubs %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162iubs zmm2 {k7} {z}, zmm3
|
|
0x62,0xf5,0x7f,0xcf,0x6a,0xd3
|
|
|
|
# ATT: vcvttbf162iubs %ymm3, %ymm2
|
|
# INTEL: vcvttbf162iubs ymm2, ymm3
|
|
0x62,0xf5,0x7f,0x28,0x6a,0xd3
|
|
|
|
# ATT: vcvttbf162iubs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvttbf162iubs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7f,0x2f,0x6a,0xd3
|
|
|
|
# ATT: vcvttbf162iubs %ymm3, %ymm2 {%k7} {z}
|
|
# INTEL: vcvttbf162iubs ymm2 {k7} {z}, ymm3
|
|
0x62,0xf5,0x7f,0xaf,0x6a,0xd3
|
|
|
|
# ATT: vcvttbf162iubs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvttbf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttbf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvttbf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttbf162iubs (%eax){1to8}, %xmm2
|
|
# INTEL: vcvttbf162iubs xmm2, word ptr [eax]{1to8}
|
|
0x62,0xf5,0x7f,0x18,0x6a,0x10
|
|
|
|
# ATT: vcvttbf162iubs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvttbf162iubs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7f,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvttbf162iubs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7f,0x8f,0x6a,0x51,0x7f
|
|
|
|
# ATT: vcvttbf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
|
|
0x62,0xf5,0x7f,0x9f,0x6a,0x52,0x80
|
|
|
|
# ATT: vcvttbf162iubs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvttbf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttbf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvttbf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttbf162iubs (%eax){1to16}, %ymm2
|
|
# INTEL: vcvttbf162iubs ymm2, word ptr [eax]{1to16}
|
|
0x62,0xf5,0x7f,0x38,0x6a,0x10
|
|
|
|
# ATT: vcvttbf162iubs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvttbf162iubs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7f,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvttbf162iubs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvttbf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7f,0xaf,0x6a,0x51,0x7f
|
|
|
|
# ATT: vcvttbf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvttbf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
|
|
0x62,0xf5,0x7f,0xbf,0x6a,0x52,0x80
|
|
|
|
# ATT: vcvttbf162iubs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvttbf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7f,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttbf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvttbf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7f,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttbf162iubs (%eax){1to32}, %zmm2
|
|
# INTEL: vcvttbf162iubs zmm2, word ptr [eax]{1to32}
|
|
0x62,0xf5,0x7f,0x58,0x6a,0x10
|
|
|
|
# ATT: vcvttbf162iubs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvttbf162iubs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7f,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvttbf162iubs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7f,0xcf,0x6a,0x51,0x7f
|
|
|
|
# ATT: vcvttbf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttbf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
|
|
0x62,0xf5,0x7f,0xdf,0x6a,0x52,0x80
|
|
|
|
# ATT: vcvttph2ibs %xmm3, %xmm2
|
|
# INTEL: vcvttph2ibs xmm2, xmm3
|
|
0x62,0xf5,0x7c,0x08,0x68,0xd3
|
|
|
|
# ATT: vcvttph2ibs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvttph2ibs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7c,0x0f,0x68,0xd3
|
|
|
|
# ATT: vcvttph2ibs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttph2ibs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7c,0x8f,0x68,0xd3
|
|
|
|
# ATT: vcvttph2ibs %zmm3, %zmm2
|
|
# INTEL: vcvttph2ibs zmm2, zmm3
|
|
0x62,0xf5,0x7c,0x48,0x68,0xd3
|
|
|
|
# ATT: vcvttph2ibs {sae}, %zmm3, %zmm2
|
|
# INTEL: vcvttph2ibs zmm2, zmm3, {sae}
|
|
0x62,0xf5,0x7c,0x18,0x68,0xd3
|
|
|
|
# ATT: vcvttph2ibs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvttph2ibs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7c,0x4f,0x68,0xd3
|
|
|
|
# ATT: vcvttph2ibs {sae}, %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttph2ibs zmm2 {k7} {z}, zmm3, {sae}
|
|
0x62,0xf5,0x7c,0x9f,0x68,0xd3
|
|
|
|
# ATT: vcvttph2ibs %ymm3, %ymm2
|
|
# INTEL: vcvttph2ibs ymm2, ymm3
|
|
0x62,0xf5,0x7c,0x28,0x68,0xd3
|
|
|
|
# ATT: vcvttph2ibs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvttph2ibs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7c,0x2f,0x68,0xd3
|
|
|
|
# ATT: vcvttph2ibs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvttph2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttph2ibs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvttph2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttph2ibs (%eax){1to8}, %xmm2
|
|
# INTEL: vcvttph2ibs xmm2, word ptr [eax]{1to8}
|
|
0x62,0xf5,0x7c,0x18,0x68,0x10
|
|
|
|
# ATT: vcvttph2ibs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvttph2ibs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7c,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvttph2ibs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvttph2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7c,0x8f,0x68,0x51,0x7f
|
|
|
|
# ATT: vcvttph2ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttph2ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
|
|
0x62,0xf5,0x7c,0x9f,0x68,0x52,0x80
|
|
|
|
# ATT: vcvttph2ibs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvttph2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttph2ibs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvttph2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttph2ibs (%eax){1to16}, %ymm2
|
|
# INTEL: vcvttph2ibs ymm2, word ptr [eax]{1to16}
|
|
0x62,0xf5,0x7c,0x38,0x68,0x10
|
|
|
|
# ATT: vcvttph2ibs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvttph2ibs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7c,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvttph2ibs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvttph2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7c,0xaf,0x68,0x51,0x7f
|
|
|
|
# ATT: vcvttph2ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvttph2ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
|
|
0x62,0xf5,0x7c,0xbf,0x68,0x52,0x80
|
|
|
|
# ATT: vcvttph2ibs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvttph2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttph2ibs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvttph2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttph2ibs (%eax){1to32}, %zmm2
|
|
# INTEL: vcvttph2ibs zmm2, word ptr [eax]{1to32}
|
|
0x62,0xf5,0x7c,0x58,0x68,0x10
|
|
|
|
# ATT: vcvttph2ibs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvttph2ibs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7c,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvttph2ibs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvttph2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7c,0xcf,0x68,0x51,0x7f
|
|
|
|
# ATT: vcvttph2ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttph2ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
|
|
0x62,0xf5,0x7c,0xdf,0x68,0x52,0x80
|
|
|
|
# ATT: vcvttph2iubs %xmm3, %xmm2
|
|
# INTEL: vcvttph2iubs xmm2, xmm3
|
|
0x62,0xf5,0x7c,0x08,0x6a,0xd3
|
|
|
|
# ATT: vcvttph2iubs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvttph2iubs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7c,0x0f,0x6a,0xd3
|
|
|
|
# ATT: vcvttph2iubs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttph2iubs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7c,0x8f,0x6a,0xd3
|
|
|
|
# ATT: vcvttph2iubs %zmm3, %zmm2
|
|
# INTEL: vcvttph2iubs zmm2, zmm3
|
|
0x62,0xf5,0x7c,0x48,0x6a,0xd3
|
|
|
|
# ATT: vcvttph2iubs {sae}, %zmm3, %zmm2
|
|
# INTEL: vcvttph2iubs zmm2, zmm3, {sae}
|
|
0x62,0xf5,0x7c,0x18,0x6a,0xd3
|
|
|
|
# ATT: vcvttph2iubs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvttph2iubs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7c,0x4f,0x6a,0xd3
|
|
|
|
# ATT: vcvttph2iubs {sae}, %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttph2iubs zmm2 {k7} {z}, zmm3, {sae}
|
|
0x62,0xf5,0x7c,0x9f,0x6a,0xd3
|
|
|
|
# ATT: vcvttph2iubs %ymm3, %ymm2
|
|
# INTEL: vcvttph2iubs ymm2, ymm3
|
|
0x62,0xf5,0x7c,0x28,0x6a,0xd3
|
|
|
|
# ATT: vcvttph2iubs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvttph2iubs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7c,0x2f,0x6a,0xd3
|
|
|
|
# ATT: vcvttph2iubs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvttph2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttph2iubs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvttph2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttph2iubs (%eax){1to8}, %xmm2
|
|
# INTEL: vcvttph2iubs xmm2, word ptr [eax]{1to8}
|
|
0x62,0xf5,0x7c,0x18,0x6a,0x10
|
|
|
|
# ATT: vcvttph2iubs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvttph2iubs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7c,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvttph2iubs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvttph2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7c,0x8f,0x6a,0x51,0x7f
|
|
|
|
# ATT: vcvttph2iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttph2iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
|
|
0x62,0xf5,0x7c,0x9f,0x6a,0x52,0x80
|
|
|
|
# ATT: vcvttph2iubs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvttph2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttph2iubs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvttph2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttph2iubs (%eax){1to16}, %ymm2
|
|
# INTEL: vcvttph2iubs ymm2, word ptr [eax]{1to16}
|
|
0x62,0xf5,0x7c,0x38,0x6a,0x10
|
|
|
|
# ATT: vcvttph2iubs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvttph2iubs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7c,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvttph2iubs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvttph2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7c,0xaf,0x6a,0x51,0x7f
|
|
|
|
# ATT: vcvttph2iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvttph2iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
|
|
0x62,0xf5,0x7c,0xbf,0x6a,0x52,0x80
|
|
|
|
# ATT: vcvttph2iubs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvttph2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7c,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttph2iubs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvttph2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7c,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttph2iubs (%eax){1to32}, %zmm2
|
|
# INTEL: vcvttph2iubs zmm2, word ptr [eax]{1to32}
|
|
0x62,0xf5,0x7c,0x58,0x6a,0x10
|
|
|
|
# ATT: vcvttph2iubs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvttph2iubs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7c,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvttph2iubs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvttph2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7c,0xcf,0x6a,0x51,0x7f
|
|
|
|
# ATT: vcvttph2iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttph2iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
|
|
0x62,0xf5,0x7c,0xdf,0x6a,0x52,0x80
|
|
|
|
# ATT: vcvttps2ibs %xmm3, %xmm2
|
|
# INTEL: vcvttps2ibs xmm2, xmm3
|
|
0x62,0xf5,0x7d,0x08,0x68,0xd3
|
|
|
|
# ATT: vcvttps2ibs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvttps2ibs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7d,0x0f,0x68,0xd3
|
|
|
|
# ATT: vcvttps2ibs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttps2ibs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7d,0x8f,0x68,0xd3
|
|
|
|
# ATT: vcvttps2ibs %zmm3, %zmm2
|
|
# INTEL: vcvttps2ibs zmm2, zmm3
|
|
0x62,0xf5,0x7d,0x48,0x68,0xd3
|
|
|
|
# ATT: vcvttps2ibs {sae}, %zmm3, %zmm2
|
|
# INTEL: vcvttps2ibs zmm2, zmm3, {sae}
|
|
0x62,0xf5,0x7d,0x18,0x68,0xd3
|
|
|
|
# ATT: vcvttps2ibs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvttps2ibs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7d,0x4f,0x68,0xd3
|
|
|
|
# ATT: vcvttps2ibs {sae}, %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttps2ibs zmm2 {k7} {z}, zmm3, {sae}
|
|
0x62,0xf5,0x7d,0x9f,0x68,0xd3
|
|
|
|
# ATT: vcvttps2ibs %ymm3, %ymm2
|
|
# INTEL: vcvttps2ibs ymm2, ymm3
|
|
0x62,0xf5,0x7d,0x28,0x68,0xd3
|
|
|
|
# ATT: vcvttps2ibs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvttps2ibs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7d,0x2f,0x68,0xd3
|
|
|
|
# ATT: vcvttps2ibs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvttps2ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttps2ibs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvttps2ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttps2ibs (%eax){1to4}, %xmm2
|
|
# INTEL: vcvttps2ibs xmm2, dword ptr [eax]{1to4}
|
|
0x62,0xf5,0x7d,0x18,0x68,0x10
|
|
|
|
# ATT: vcvttps2ibs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvttps2ibs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7d,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvttps2ibs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvttps2ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7d,0x8f,0x68,0x51,0x7f
|
|
|
|
# ATT: vcvttps2ibs -512(%edx){1to4}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttps2ibs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
|
|
0x62,0xf5,0x7d,0x9f,0x68,0x52,0x80
|
|
|
|
# ATT: vcvttps2ibs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvttps2ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttps2ibs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvttps2ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttps2ibs (%eax){1to8}, %ymm2
|
|
# INTEL: vcvttps2ibs ymm2, dword ptr [eax]{1to8}
|
|
0x62,0xf5,0x7d,0x38,0x68,0x10
|
|
|
|
# ATT: vcvttps2ibs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvttps2ibs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7d,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvttps2ibs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvttps2ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7d,0xaf,0x68,0x51,0x7f
|
|
|
|
# ATT: vcvttps2ibs -512(%edx){1to8}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvttps2ibs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
|
|
0x62,0xf5,0x7d,0xbf,0x68,0x52,0x80
|
|
|
|
# ATT: vcvttps2ibs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvttps2ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttps2ibs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvttps2ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttps2ibs (%eax){1to16}, %zmm2
|
|
# INTEL: vcvttps2ibs zmm2, dword ptr [eax]{1to16}
|
|
0x62,0xf5,0x7d,0x58,0x68,0x10
|
|
|
|
# ATT: vcvttps2ibs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvttps2ibs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7d,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvttps2ibs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvttps2ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7d,0xcf,0x68,0x51,0x7f
|
|
|
|
# ATT: vcvttps2ibs -512(%edx){1to16}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttps2ibs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
|
|
0x62,0xf5,0x7d,0xdf,0x68,0x52,0x80
|
|
|
|
# ATT: vcvttps2iubs %xmm3, %xmm2
|
|
# INTEL: vcvttps2iubs xmm2, xmm3
|
|
0x62,0xf5,0x7d,0x08,0x6a,0xd3
|
|
|
|
# ATT: vcvttps2iubs %xmm3, %xmm2 {%k7}
|
|
# INTEL: vcvttps2iubs xmm2 {k7}, xmm3
|
|
0x62,0xf5,0x7d,0x0f,0x6a,0xd3
|
|
|
|
# ATT: vcvttps2iubs %xmm3, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttps2iubs xmm2 {k7} {z}, xmm3
|
|
0x62,0xf5,0x7d,0x8f,0x6a,0xd3
|
|
|
|
# ATT: vcvttps2iubs %zmm3, %zmm2
|
|
# INTEL: vcvttps2iubs zmm2, zmm3
|
|
0x62,0xf5,0x7d,0x48,0x6a,0xd3
|
|
|
|
# ATT: vcvttps2iubs {sae}, %zmm3, %zmm2
|
|
# INTEL: vcvttps2iubs zmm2, zmm3, {sae}
|
|
0x62,0xf5,0x7d,0x18,0x6a,0xd3
|
|
|
|
# ATT: vcvttps2iubs %zmm3, %zmm2 {%k7}
|
|
# INTEL: vcvttps2iubs zmm2 {k7}, zmm3
|
|
0x62,0xf5,0x7d,0x4f,0x6a,0xd3
|
|
|
|
# ATT: vcvttps2iubs {sae}, %zmm3, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttps2iubs zmm2 {k7} {z}, zmm3, {sae}
|
|
0x62,0xf5,0x7d,0x9f,0x6a,0xd3
|
|
|
|
# ATT: vcvttps2iubs %ymm3, %ymm2
|
|
# INTEL: vcvttps2iubs ymm2, ymm3
|
|
0x62,0xf5,0x7d,0x28,0x6a,0xd3
|
|
|
|
# ATT: vcvttps2iubs %ymm3, %ymm2 {%k7}
|
|
# INTEL: vcvttps2iubs ymm2 {k7}, ymm3
|
|
0x62,0xf5,0x7d,0x2f,0x6a,0xd3
|
|
|
|
# ATT: vcvttps2iubs 268435456(%esp,%esi,8), %xmm2
|
|
# INTEL: vcvttps2iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttps2iubs 291(%edi,%eax,4), %xmm2 {%k7}
|
|
# INTEL: vcvttps2iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttps2iubs (%eax){1to4}, %xmm2
|
|
# INTEL: vcvttps2iubs xmm2, dword ptr [eax]{1to4}
|
|
0x62,0xf5,0x7d,0x18,0x6a,0x10
|
|
|
|
# ATT: vcvttps2iubs -512(,%ebp,2), %xmm2
|
|
# INTEL: vcvttps2iubs xmm2, xmmword ptr [2*ebp - 512]
|
|
0x62,0xf5,0x7d,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff
|
|
|
|
# ATT: vcvttps2iubs 2032(%ecx), %xmm2 {%k7} {z}
|
|
# INTEL: vcvttps2iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
|
|
0x62,0xf5,0x7d,0x8f,0x6a,0x51,0x7f
|
|
|
|
# ATT: vcvttps2iubs -512(%edx){1to4}, %xmm2 {%k7} {z}
|
|
# INTEL: vcvttps2iubs xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
|
|
0x62,0xf5,0x7d,0x9f,0x6a,0x52,0x80
|
|
|
|
# ATT: vcvttps2iubs 268435456(%esp,%esi,8), %ymm2
|
|
# INTEL: vcvttps2iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttps2iubs 291(%edi,%eax,4), %ymm2 {%k7}
|
|
# INTEL: vcvttps2iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttps2iubs (%eax){1to8}, %ymm2
|
|
# INTEL: vcvttps2iubs ymm2, dword ptr [eax]{1to8}
|
|
0x62,0xf5,0x7d,0x38,0x6a,0x10
|
|
|
|
# ATT: vcvttps2iubs -1024(,%ebp,2), %ymm2
|
|
# INTEL: vcvttps2iubs ymm2, ymmword ptr [2*ebp - 1024]
|
|
0x62,0xf5,0x7d,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff
|
|
|
|
# ATT: vcvttps2iubs 4064(%ecx), %ymm2 {%k7} {z}
|
|
# INTEL: vcvttps2iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
|
|
0x62,0xf5,0x7d,0xaf,0x6a,0x51,0x7f
|
|
|
|
# ATT: vcvttps2iubs -512(%edx){1to8}, %ymm2 {%k7} {z}
|
|
# INTEL: vcvttps2iubs ymm2 {k7} {z}, dword ptr [edx - 512]{1to8}
|
|
0x62,0xf5,0x7d,0xbf,0x6a,0x52,0x80
|
|
|
|
# ATT: vcvttps2iubs 268435456(%esp,%esi,8), %zmm2
|
|
# INTEL: vcvttps2iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
|
|
0x62,0xf5,0x7d,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
|
|
|
|
# ATT: vcvttps2iubs 291(%edi,%eax,4), %zmm2 {%k7}
|
|
# INTEL: vcvttps2iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
|
|
0x62,0xf5,0x7d,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
|
|
|
|
# ATT: vcvttps2iubs (%eax){1to16}, %zmm2
|
|
# INTEL: vcvttps2iubs zmm2, dword ptr [eax]{1to16}
|
|
0x62,0xf5,0x7d,0x58,0x6a,0x10
|
|
|
|
# ATT: vcvttps2iubs -2048(,%ebp,2), %zmm2
|
|
# INTEL: vcvttps2iubs zmm2, zmmword ptr [2*ebp - 2048]
|
|
0x62,0xf5,0x7d,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff
|
|
|
|
# ATT: vcvttps2iubs 8128(%ecx), %zmm2 {%k7} {z}
|
|
# INTEL: vcvttps2iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
|
|
0x62,0xf5,0x7d,0xcf,0x6a,0x51,0x7f
|
|
|
|
# ATT: vcvttps2iubs -512(%edx){1to16}, %zmm2 {%k7} {z}
|
|
# INTEL: vcvttps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
|
|
0x62,0xf5,0x7d,0xdf,0x6a,0x52,0x80
|
|
|