derek.holloway
7502bf64a4
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38 lines
859 B
ArmAsm
38 lines
859 B
ArmAsm
# RUN: llvm-mc -triple=hexagon -mattr=+hvxv68 -filetype=obj %s | llvm-objdump --no-print-imm-hex --mattr=+hvxv68 -d - | FileCheck %s
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# packet w/accum with register different from one loaded to
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{
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v1.tmp = vmem(r0+#0)
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v0.w += vrmpy(v1.b,v2.b)
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}
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# CHECK: { v0.w += vrmpy(v1.b,v2.b)
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# CHECK-NEXT: v1.tmp = vmem(r0+#0) }
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# packet w/accum and store or other non-def register use
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{
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v1.tmp = vmem(r0+#0)
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v0 += vrmpyub(v1, v3)
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vmem(r0) = v0
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}
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# CHECK: { v0.uw += vrmpy(v1.ub,v3.ub)
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# CHECK-NEXT: v1.tmp = vmem(r0+#0)
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# CHECK-NEXT: vmem(r0+#0) = v0 }
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# packet w/non-accum and otherwise-legal register def/use
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{
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v0.tmp =vmem(r2+#0)
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Q3 = vcmp.eq(v0.w, v5.w)
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}
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# CHECK: { q3 = vcmp.eq(v0.w,v5.w)
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# CHECK-NEXT: v0.tmp = vmem(r2+#0) }
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# scalar "accums" unaffected by this change.
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{
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r0 += add(r1, r2)
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}
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# CHECK { r0 += add(r1,r2) }
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