TheRock/compiler/amd-llvm/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-dup.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=instcombine < %s | FileCheck %s

target triple = "aarch64-unknown-linux-gnu"

define <vscale x 16 x i8> @dup_insertelement_0(<vscale x 16 x i8> %v, i8 %s) #0 {
; CHECK-LABEL: @dup_insertelement_0(
; CHECK-NEXT:    [[INSERT:%.*]] = insertelement <vscale x 16 x i8> [[V:%.*]], i8 [[S:%.*]], i64 0
; CHECK-NEXT:    ret <vscale x 16 x i8> [[INSERT]]
;
  %pg = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 1)
  %insert = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> %v, <vscale x 16 x i1> %pg, i8 %s)
  ret <vscale x 16 x i8> %insert
}

define <vscale x 16 x i8> @dup_insertelement_1(<vscale x 16 x i8> %v, i8 %s) #0 {
; CHECK-LABEL: @dup_insertelement_1(
; CHECK-NEXT:    [[PG:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 2)
; CHECK-NEXT:    [[INSERT:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[V:%.*]], <vscale x 16 x i1> [[PG]], i8 [[S:%.*]])
; CHECK-NEXT:    ret <vscale x 16 x i8> [[INSERT]]
;
  %pg = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 2)
  %insert = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> %v, <vscale x 16 x i1> %pg, i8 %s)
  ret <vscale x 16 x i8> %insert
}

define <vscale x 16 x i8> @dup_insertelement_x(<vscale x 16 x i8> %v, i8 %s, <vscale x 16 x i1> %pg) #0 {
; CHECK-LABEL: @dup_insertelement_x(
; CHECK-NEXT:    [[INSERT:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> [[V:%.*]], <vscale x 16 x i1> [[PG:%.*]], i8 [[S:%.*]])
; CHECK-NEXT:    ret <vscale x 16 x i8> [[INSERT]]
;
  %insert = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> %v, <vscale x 16 x i1> %pg, i8 %s)
  ret <vscale x 16 x i8> %insert
}

define <vscale x 8 x i16> @dup_insertelement_0_convert(<vscale x 8 x i16> %v, i16 %s) #0 {
; CHECK-LABEL: @dup_insertelement_0_convert(
; CHECK-NEXT:    [[INSERT:%.*]] = insertelement <vscale x 8 x i16> [[V:%.*]], i16 [[S:%.*]], i64 0
; CHECK-NEXT:    ret <vscale x 8 x i16> [[INSERT]]
;
  %pg = tail call <vscale x 8 x i1> @llvm.aarch64.sve.ptrue.nxv8i1(i32 1)
  %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> %pg)
  %2 = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %1)
  %insert = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> %v, <vscale x 8 x i1> %2, i16 %s)
  ret <vscale x 8 x i16> %insert
}

define <vscale x 8 x i16> @dupx_splat_convert(i16 %s) #0 {
; CHECK-LABEL: @dupx_splat_convert(
; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[S:%.*]], i64 0
; CHECK-NEXT:    [[SPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
; CHECK-NEXT:    ret <vscale x 8 x i16> [[SPLAT]]
;
  %splat = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %s)
  ret <vscale x 8 x i16> %splat
}

define <vscale x 16 x i8> @dup_all_active_i8(<vscale x 16 x i8> %v, i8 %s) #0 {
; CHECK-LABEL: @dup_all_active_i8(
; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 16 x i8> poison, i8 [[S:%.*]], i64 0
; CHECK-NEXT:    [[INSERT:%.*]] = shufflevector <vscale x 16 x i8> [[DOTSPLATINSERT]], <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
; CHECK-NEXT:    ret <vscale x 16 x i8> [[INSERT]]
;
  %insert = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> %v, <vscale x 16 x i1> splat(i1 true), i8 %s)
  ret <vscale x 16 x i8> %insert
}

define <vscale x 4 x i32> @dup_all_active_i32(<vscale x 4 x i32> %v) #0 {
; CHECK-LABEL: @dup_all_active_i32(
; CHECK-NEXT:    ret <vscale x 4 x i32> splat (i32 73)
;
  %insert = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> %v, <vscale x 4 x i1> splat(i1 true), i32 73)
  ret <vscale x 4 x i32> %insert
}

define <vscale x 4 x float> @dup_all_active_f32(<vscale x 4 x float> %v, float %s) #0 {
; CHECK-LABEL: @dup_all_active_f32(
; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x float> poison, float [[S:%.*]], i64 0
; CHECK-NEXT:    [[INSERT:%.*]] = shufflevector <vscale x 4 x float> [[DOTSPLATINSERT]], <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
; CHECK-NEXT:    ret <vscale x 4 x float> [[INSERT]]
;
  %insert = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> %v, <vscale x 4 x i1> splat(i1 true), float %s)
  ret <vscale x 4 x float> %insert
}

define <vscale x 2 x double> @dup_all_active_f64(<vscale x 2 x double> %v) #0 {
; CHECK-LABEL: @dup_all_active_f64(
; CHECK-NEXT:    ret <vscale x 2 x double> splat (double 1.000000e+00)
;
  %insert = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> %v, <vscale x 2 x i1> splat(i1 true), double 1.0)
  ret <vscale x 2 x double> %insert
}

attributes #0 = { "target-features"="+sve" }