derek.holloway
7502bf64a4
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158 lines
4.8 KiB
LLVM
158 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-none-eabi | FileCheck %s
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; i256 shift left with variable amount
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define i256 @shl_i256(i256 %a, i256 %amt) nounwind {
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; CHECK-LABEL: shl_i256:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub sp, sp, #64
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: lsr x8, x4, #3
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: add x9, x9, #32
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; CHECK-NEXT: stp x2, x3, [sp, #48]
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; CHECK-NEXT: mvn w14, w4
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; CHECK-NEXT: and x8, x8, #0x18
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; CHECK-NEXT: stp x0, x1, [sp, #32]
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; CHECK-NEXT: and x11, x4, #0x3f
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; CHECK-NEXT: sub x8, x9, x8
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; CHECK-NEXT: eor x11, x11, #0x3f
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; CHECK-NEXT: stp q0, q0, [sp]
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; CHECK-NEXT: ldp x10, x9, [x8]
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; CHECK-NEXT: ldp x12, x8, [x8, #16]
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; CHECK-NEXT: lsr x13, x9, #1
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; CHECK-NEXT: lsr x15, x10, #1
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; CHECK-NEXT: lsl x9, x9, x4
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; CHECK-NEXT: lsl x8, x8, x4
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; CHECK-NEXT: lsl x0, x10, x4
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; CHECK-NEXT: lsr x13, x13, x14
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; CHECK-NEXT: lsr x14, x12, #1
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; CHECK-NEXT: lsr x15, x15, x11
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; CHECK-NEXT: lsl x12, x12, x4
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; CHECK-NEXT: lsr x11, x14, x11
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; CHECK-NEXT: orr x1, x9, x15
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; CHECK-NEXT: orr x2, x12, x13
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; CHECK-NEXT: orr x3, x8, x11
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; CHECK-NEXT: add sp, sp, #64
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; CHECK-NEXT: ret
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%r = shl i256 %a, %amt
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ret i256 %r
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}
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; i256 logical shift right with variable amount
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define i256 @lshr_i256(i256 %a, i256 %amt) nounwind {
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; CHECK-LABEL: lshr_i256:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub sp, sp, #64
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: lsr x8, x4, #3
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: stp x2, x3, [sp, #16]
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; CHECK-NEXT: and x11, x4, #0x3f
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; CHECK-NEXT: mvn w13, w4
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; CHECK-NEXT: and x8, x8, #0x18
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; CHECK-NEXT: stp x0, x1, [sp]
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; CHECK-NEXT: eor x11, x11, #0x3f
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; CHECK-NEXT: add x8, x9, x8
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; CHECK-NEXT: stp q0, q0, [sp, #32]
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; CHECK-NEXT: ldp x9, x10, [x8]
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; CHECK-NEXT: ldp x12, x8, [x8, #16]
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; CHECK-NEXT: lsl x14, x10, #1
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; CHECK-NEXT: lsr x9, x9, x4
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; CHECK-NEXT: lsr x10, x10, x4
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; CHECK-NEXT: lsl x15, x12, #1
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; CHECK-NEXT: lsl x16, x8, #1
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; CHECK-NEXT: lsr x12, x12, x4
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; CHECK-NEXT: lsl x14, x14, x11
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; CHECK-NEXT: lsr x3, x8, x4
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; CHECK-NEXT: lsl x8, x15, x13
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; CHECK-NEXT: lsl x11, x16, x11
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; CHECK-NEXT: orr x0, x14, x9
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; CHECK-NEXT: orr x1, x10, x8
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; CHECK-NEXT: orr x2, x11, x12
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; CHECK-NEXT: add sp, sp, #64
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; CHECK-NEXT: ret
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%r = lshr i256 %a, %amt
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ret i256 %r
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}
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; i256 arithmetic shift right with variable amount
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define i256 @ashr_i256(i256 %a, i256 %amt) nounwind {
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; CHECK-LABEL: ashr_i256:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub sp, sp, #64
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; CHECK-NEXT: lsr x9, x4, #3
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; CHECK-NEXT: asr x8, x3, #63
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; CHECK-NEXT: mov x10, sp
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; CHECK-NEXT: stp x2, x3, [sp, #16]
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; CHECK-NEXT: mvn w14, w4
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; CHECK-NEXT: and x13, x4, #0x3f
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; CHECK-NEXT: and x9, x9, #0x18
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; CHECK-NEXT: stp x0, x1, [sp]
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; CHECK-NEXT: eor x13, x13, #0x3f
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; CHECK-NEXT: stp x8, x8, [sp, #48]
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; CHECK-NEXT: add x9, x10, x9
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; CHECK-NEXT: stp x8, x8, [sp, #32]
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; CHECK-NEXT: ldp x10, x8, [x9, #8]
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; CHECK-NEXT: ldr x11, [x9]
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; CHECK-NEXT: ldr x9, [x9, #24]
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; CHECK-NEXT: lsr x11, x11, x4
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; CHECK-NEXT: lsl x12, x8, #1
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; CHECK-NEXT: lsl x15, x10, #1
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; CHECK-NEXT: lsr x10, x10, x4
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; CHECK-NEXT: lsr x8, x8, x4
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; CHECK-NEXT: asr x3, x9, x4
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; CHECK-NEXT: lsl x12, x12, x14
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; CHECK-NEXT: lsl x14, x9, #1
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; CHECK-NEXT: lsl x15, x15, x13
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; CHECK-NEXT: lsl x13, x14, x13
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; CHECK-NEXT: orr x0, x15, x11
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; CHECK-NEXT: orr x1, x10, x12
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; CHECK-NEXT: orr x2, x13, x8
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; CHECK-NEXT: add sp, sp, #64
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; CHECK-NEXT: ret
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%r = ashr i256 %a, %amt
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ret i256 %r
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}
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; i256 shift left by constant
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define i256 @shl_i256_const(i256 %a) nounwind {
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; CHECK-LABEL: shl_i256_const:
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; CHECK: // %bb.0:
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; CHECK-NEXT: extr x8, x2, x1, #47
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; CHECK-NEXT: lsl x9, x0, #17
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; CHECK-NEXT: extr x1, x1, x0, #47
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; CHECK-NEXT: extr x3, x3, x2, #47
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; CHECK-NEXT: mov x0, x9
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; CHECK-NEXT: mov x2, x8
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; CHECK-NEXT: ret
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%r = shl i256 %a, 17
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ret i256 %r
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}
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; i256 logical shift right by constant
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define i256 @lshr_i256_const(i256 %a) nounwind {
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; CHECK-LABEL: lshr_i256_const:
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; CHECK: // %bb.0:
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; CHECK-NEXT: extr x0, x1, x0, #17
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; CHECK-NEXT: extr x1, x2, x1, #17
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; CHECK-NEXT: extr x2, x3, x2, #17
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; CHECK-NEXT: lsr x3, x3, #17
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; CHECK-NEXT: ret
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%r = lshr i256 %a, 17
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ret i256 %r
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}
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; i256 arithmetic shift right by constant
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define i256 @ashr_i256_const(i256 %a) nounwind {
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; CHECK-LABEL: ashr_i256_const:
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; CHECK: // %bb.0:
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; CHECK-NEXT: extr x0, x1, x0, #17
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; CHECK-NEXT: extr x1, x2, x1, #17
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; CHECK-NEXT: extr x2, x3, x2, #17
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; CHECK-NEXT: asr x3, x3, #17
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; CHECK-NEXT: ret
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%r = ashr i256 %a, 17
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ret i256 %r
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}
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