derek.holloway
7502bf64a4
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479 lines
16 KiB
LLVM
479 lines
16 KiB
LLVM
; RUN: llc -mtriple=amdgcn-- < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -mtriple=amdgcn-- -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
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; RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,FUNC %s
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; RUN: llc -mtriple=r600-- -mcpu=cypress < %s | FileCheck -check-prefixes=EG,FUNC %s
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; FUNC-LABEL: {{^}}local_load_i1:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN: ds_read_u8
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; GCN: v_and_b32_e32 v{{[0-9]+}}, 1
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; GCN: ds_write_b8
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; EG: LDS_UBYTE_READ_RET
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; EG: AND_INT
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; EG: LDS_BYTE_WRITE
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define amdgpu_kernel void @local_load_i1(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load i1, ptr addrspace(3) %in
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store i1 %load, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v2i1:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_load_v2i1(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <2 x i1>, ptr addrspace(3) %in
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store <2 x i1> %load, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v3i1:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_load_v3i1(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <3 x i1>, ptr addrspace(3) %in
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store <3 x i1> %load, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v4i1:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_load_v4i1(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <4 x i1>, ptr addrspace(3) %in
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store <4 x i1> %load, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v8i1:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_load_v8i1(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <8 x i1>, ptr addrspace(3) %in
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store <8 x i1> %load, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v16i1:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_load_v16i1(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <16 x i1>, ptr addrspace(3) %in
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store <16 x i1> %load, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v32i1:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_load_v32i1(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <32 x i1>, ptr addrspace(3) %in
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store <32 x i1> %load, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_load_v64i1:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_load_v64i1(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <64 x i1>, ptr addrspace(3) %in
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store <64 x i1> %load, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_i1_to_i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN: ds_read_u8
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; GCN: ds_write_b32
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define amdgpu_kernel void @local_zextload_i1_to_i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%a = load i1, ptr addrspace(3) %in
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%ext = zext i1 %a to i32
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store i32 %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_i1_to_i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN: ds_read_u8
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; GCN: v_bfe_i32 {{v[0-9]+}}, {{v[0-9]+}}, 0, 1{{$}}
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; GCN: ds_write_b32
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; EG: LDS_UBYTE_READ_RET
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; EG: BFE_INT
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define amdgpu_kernel void @local_sextload_i1_to_i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%a = load i1, ptr addrspace(3) %in
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%ext = sext i1 %a to i32
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store i32 %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v1i1_to_v1i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_zextload_v1i1_to_v1i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <1 x i1>, ptr addrspace(3) %in
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%ext = zext <1 x i1> %load to <1 x i32>
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store <1 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_v1i1_to_v1i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_sextload_v1i1_to_v1i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <1 x i1>, ptr addrspace(3) %in
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%ext = sext <1 x i1> %load to <1 x i32>
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store <1 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v2i1_to_v2i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_zextload_v2i1_to_v2i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <2 x i1>, ptr addrspace(3) %in
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%ext = zext <2 x i1> %load to <2 x i32>
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store <2 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_v2i1_to_v2i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_sextload_v2i1_to_v2i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <2 x i1>, ptr addrspace(3) %in
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%ext = sext <2 x i1> %load to <2 x i32>
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store <2 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v3i1_to_v3i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_zextload_v3i1_to_v3i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <3 x i1>, ptr addrspace(3) %in
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%ext = zext <3 x i1> %load to <3 x i32>
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store <3 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_v3i1_to_v3i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_sextload_v3i1_to_v3i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <3 x i1>, ptr addrspace(3) %in
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%ext = sext <3 x i1> %load to <3 x i32>
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store <3 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v4i1_to_v4i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_zextload_v4i1_to_v4i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <4 x i1>, ptr addrspace(3) %in
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%ext = zext <4 x i1> %load to <4 x i32>
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store <4 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_v4i1_to_v4i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_sextload_v4i1_to_v4i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <4 x i1>, ptr addrspace(3) %in
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%ext = sext <4 x i1> %load to <4 x i32>
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store <4 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v8i1_to_v8i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_zextload_v8i1_to_v8i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <8 x i1>, ptr addrspace(3) %in
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%ext = zext <8 x i1> %load to <8 x i32>
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store <8 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_v8i1_to_v8i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_sextload_v8i1_to_v8i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <8 x i1>, ptr addrspace(3) %in
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%ext = sext <8 x i1> %load to <8 x i32>
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store <8 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v16i1_to_v16i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_zextload_v16i1_to_v16i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <16 x i1>, ptr addrspace(3) %in
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%ext = zext <16 x i1> %load to <16 x i32>
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store <16 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_v16i1_to_v16i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_sextload_v16i1_to_v16i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <16 x i1>, ptr addrspace(3) %in
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%ext = sext <16 x i1> %load to <16 x i32>
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store <16 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v32i1_to_v32i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_zextload_v32i1_to_v32i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <32 x i1>, ptr addrspace(3) %in
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%ext = zext <32 x i1> %load to <32 x i32>
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store <32 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_v32i1_to_v32i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_sextload_v32i1_to_v32i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <32 x i1>, ptr addrspace(3) %in
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%ext = sext <32 x i1> %load to <32 x i32>
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store <32 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v64i1_to_v64i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_zextload_v64i1_to_v64i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <64 x i1>, ptr addrspace(3) %in
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%ext = zext <64 x i1> %load to <64 x i32>
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store <64 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_v64i1_to_v64i32:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_sextload_v64i1_to_v64i32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <64 x i1>, ptr addrspace(3) %in
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%ext = sext <64 x i1> %load to <64 x i32>
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store <64 x i32> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_i1_to_i64:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN-DAG: ds_read_u8 [[LOAD:v[0-9]+]],
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; GCN-DAG: v_mov_b32_e32 {{v[0-9]+}}, 0{{$}}
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; GCN: ds_write_b64
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define amdgpu_kernel void @local_zextload_i1_to_i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%a = load i1, ptr addrspace(3) %in
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%ext = zext i1 %a to i64
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store i64 %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_i1_to_i64:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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; GCN: ds_read_u8 [[LOAD:v[0-9]+]],
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; GCN: v_bfe_i32 [[BFE:v[0-9]+]], {{v[0-9]+}}, 0, 1{{$}}
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; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 31, [[BFE]]
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; GCN: ds_write_b64
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define amdgpu_kernel void @local_sextload_i1_to_i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%a = load i1, ptr addrspace(3) %in
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%ext = sext i1 %a to i64
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store i64 %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v1i1_to_v1i64:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_zextload_v1i1_to_v1i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <1 x i1>, ptr addrspace(3) %in
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%ext = zext <1 x i1> %load to <1 x i64>
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store <1 x i64> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_sextload_v1i1_to_v1i64:
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; SICIVI: s_mov_b32 m0
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; GFX9-NOT: m0
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define amdgpu_kernel void @local_sextload_v1i1_to_v1i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
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%load = load <1 x i1>, ptr addrspace(3) %in
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%ext = sext <1 x i1> %load to <1 x i64>
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store <1 x i64> %ext, ptr addrspace(3) %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_zextload_v2i1_to_v2i64:
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; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_zextload_v2i1_to_v2i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <2 x i1>, ptr addrspace(3) %in
|
|
%ext = zext <2 x i1> %load to <2 x i64>
|
|
store <2 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_sextload_v2i1_to_v2i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_sextload_v2i1_to_v2i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <2 x i1>, ptr addrspace(3) %in
|
|
%ext = sext <2 x i1> %load to <2 x i64>
|
|
store <2 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_zextload_v3i1_to_v3i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_zextload_v3i1_to_v3i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <3 x i1>, ptr addrspace(3) %in
|
|
%ext = zext <3 x i1> %load to <3 x i64>
|
|
store <3 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_sextload_v3i1_to_v3i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_sextload_v3i1_to_v3i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <3 x i1>, ptr addrspace(3) %in
|
|
%ext = sext <3 x i1> %load to <3 x i64>
|
|
store <3 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_zextload_v4i1_to_v4i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_zextload_v4i1_to_v4i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <4 x i1>, ptr addrspace(3) %in
|
|
%ext = zext <4 x i1> %load to <4 x i64>
|
|
store <4 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_sextload_v4i1_to_v4i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_sextload_v4i1_to_v4i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <4 x i1>, ptr addrspace(3) %in
|
|
%ext = sext <4 x i1> %load to <4 x i64>
|
|
store <4 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_zextload_v8i1_to_v8i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_zextload_v8i1_to_v8i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <8 x i1>, ptr addrspace(3) %in
|
|
%ext = zext <8 x i1> %load to <8 x i64>
|
|
store <8 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_sextload_v8i1_to_v8i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_sextload_v8i1_to_v8i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <8 x i1>, ptr addrspace(3) %in
|
|
%ext = sext <8 x i1> %load to <8 x i64>
|
|
store <8 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_zextload_v16i1_to_v16i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_zextload_v16i1_to_v16i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <16 x i1>, ptr addrspace(3) %in
|
|
%ext = zext <16 x i1> %load to <16 x i64>
|
|
store <16 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_sextload_v16i1_to_v16i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_sextload_v16i1_to_v16i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <16 x i1>, ptr addrspace(3) %in
|
|
%ext = sext <16 x i1> %load to <16 x i64>
|
|
store <16 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_zextload_v32i1_to_v32i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_zextload_v32i1_to_v32i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <32 x i1>, ptr addrspace(3) %in
|
|
%ext = zext <32 x i1> %load to <32 x i64>
|
|
store <32 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_sextload_v32i1_to_v32i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_sextload_v32i1_to_v32i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <32 x i1>, ptr addrspace(3) %in
|
|
%ext = sext <32 x i1> %load to <32 x i64>
|
|
store <32 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_zextload_v64i1_to_v64i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_zextload_v64i1_to_v64i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <64 x i1>, ptr addrspace(3) %in
|
|
%ext = zext <64 x i1> %load to <64 x i64>
|
|
store <64 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_sextload_v64i1_to_v64i64:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_sextload_v64i1_to_v64i64(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {
|
|
%load = load <64 x i1>, ptr addrspace(3) %in
|
|
%ext = sext <64 x i1> %load to <64 x i64>
|
|
store <64 x i64> %ext, ptr addrspace(3) %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}local_load_i1_misaligned:
|
|
; SICIVI: s_mov_b32 m0
|
|
; GFX9-NOT: m0
|
|
define amdgpu_kernel void @local_load_i1_misaligned(ptr addrspace(3) %in, ptr addrspace (3) %out) #0 {
|
|
%in.gep.1 = getelementptr i1, ptr addrspace(3) %in, i32 1
|
|
%load.1 = load <16 x i1>, ptr addrspace(3) %in.gep.1, align 4
|
|
%load.2 = load <8 x i1>, ptr addrspace(3) %in, align 1
|
|
%out.gep.1 = getelementptr i1, ptr addrspace(3) %out, i32 16
|
|
store <16 x i1> %load.1, ptr addrspace(3) %out
|
|
store <8 x i1> %load.2, ptr addrspace(3) %out.gep.1
|
|
ret void
|
|
}
|
|
|
|
attributes #0 = { nounwind }
|