derek.holloway
7502bf64a4
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31 lines
1.1 KiB
LLVM
31 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=r600 -mcpu=redwood | FileCheck %s
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; Test a selectcc with i32 LHS/RHS and float True/False
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define amdgpu_kernel void @test(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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; CHECK-LABEL: test:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
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; CHECK-NEXT: TEX 0 @6
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; CHECK-NEXT: ALU 3, @9, KC0[CB0:0-32], KC1[]
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; CHECK-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
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; CHECK-NEXT: CF_END
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; CHECK-NEXT: PAD
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; CHECK-NEXT: Fetch clause starting at 6:
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; CHECK-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1
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; CHECK-NEXT: ALU clause starting at 8:
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; CHECK-NEXT: MOV * T0.X, KC0[2].Z,
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; CHECK-NEXT: ALU clause starting at 9:
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; CHECK-NEXT: SETGT_INT * T0.W, 0.0, T0.X,
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; CHECK-NEXT: CNDE_INT T0.X, PV.W, literal.x, 0.0,
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; CHECK-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,
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; CHECK-NEXT: 1065353216(1.000000e+00), 2(2.802597e-45)
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entry:
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%0 = load i32, ptr addrspace(1) %in
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%1 = icmp sge i32 %0, 0
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%2 = select i1 %1, float 1.0, float 0.0
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store float %2, ptr addrspace(1) %out
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ret void
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}
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