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118 lines
4.9 KiB
YAML
118 lines
4.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -run-pass=si-fold-operands -o - %s | FileCheck %s
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# This was attempting to look back through the REG_SEQUENCE source
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# operands and trying to look for physreg defs.
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---
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name: fold_reg_sequence_of_copy_from_physreg_0
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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stackPtrOffsetReg: '$sgpr32'
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occupancy: 8
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body: |
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bb.0:
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; CHECK-LABEL: name: fold_reg_sequence_of_copy_from_physreg_0
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; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: $vgpr1 = V_MOV_B32_e32 1, implicit $exec
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; CHECK-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF
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; CHECK-NEXT: FLAT_STORE_DWORDX2 killed [[DEF]], killed [[REG_SEQUENCE]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
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; CHECK-NEXT: S_ENDPGM 0
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$vgpr1 = V_MOV_B32_e32 1, implicit $exec
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S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%2:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
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%3:vreg_64_align2 = IMPLICIT_DEF
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FLAT_STORE_DWORDX2 killed %3, killed %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
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S_ENDPGM 0
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...
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---
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name: fold_reg_sequence_of_copy_from_physreg_1
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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stackPtrOffsetReg: '$sgpr32'
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occupancy: 8
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body: |
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bb.0:
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; CHECK-LABEL: name: fold_reg_sequence_of_copy_from_physreg_1
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; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: $vgpr1 = V_MOV_B32_e32 1, implicit $exec
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; CHECK-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]]
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; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF
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; CHECK-NEXT: FLAT_STORE_DWORDX2 killed [[REG_SEQUENCE]], killed [[DEF]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
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; CHECK-NEXT: S_ENDPGM 0
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$vgpr1 = V_MOV_B32_e32 1, implicit $exec
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S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
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%2:vgpr_32 = COPY %0
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%3:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %2, %subreg.sub1
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%4:vreg_64_align2 = IMPLICIT_DEF
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FLAT_STORE_DWORDX2 killed %3, killed %4, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
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S_ENDPGM 0
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...
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---
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name: fold_reg_sequence_of_copy_from_physreg_2
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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stackPtrOffsetReg: '$sgpr32'
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occupancy: 8
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body: |
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bb.0:
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; CHECK-LABEL: name: fold_reg_sequence_of_copy_from_physreg_2
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; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: $vgpr1 = V_MOV_B32_e32 1, implicit $exec
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; CHECK-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1
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; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[COPY]], %subreg.sub1
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF
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; CHECK-NEXT: FLAT_STORE_DWORDX2 killed [[DEF]], killed [[REG_SEQUENCE]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
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; CHECK-NEXT: S_ENDPGM 0
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$vgpr1 = V_MOV_B32_e32 1, implicit $exec
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S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1
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%0:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
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%1:vgpr_32 = COPY $vgpr0
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%2:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
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%3:vreg_64_align2 = IMPLICIT_DEF
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FLAT_STORE_DWORDX2 killed %3, killed %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
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S_ENDPGM 0
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...
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# This would crash looking for a def in any mayLoad instruction
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---
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name: fold_inlineasm_def
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: fold_inlineasm_def
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; CHECK: INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload isconvergent attdialect, imm, 0
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; CHECK-NEXT: S_ENDPGM 0
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INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload isconvergent attdialect, imm, 0
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S_ENDPGM 0
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...
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