derek.holloway
7502bf64a4
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25 lines
907 B
YAML
25 lines
907 B
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=liveintervals,twoaddressinstruction,register-coalescer -verify-machineinstrs -o - %s | FileCheck %s
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# Check that LiveIntervals are correctly updated when eliminating REG_SEQUENCE.
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---
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name: f
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: f
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; CHECK: liveins: $vgpr0, $vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0
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; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1
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; CHECK-NEXT: $vgpr2_vgpr3 = COPY [[COPY]]
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; CHECK-NEXT: S_NOP 0, implicit $vgpr2_vgpr3
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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%35:vreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1
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$vgpr2_vgpr3 = COPY %35
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S_NOP 0, implicit $vgpr2_vgpr3
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...
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