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40 lines
1.0 KiB
LLVM
40 lines
1.0 KiB
LLVM
; RUN: llc -mtriple=arm-linux-gnueabihf -filetype=obj <%s | llvm-objdump --triple=armv7 --no-show-raw-insn -d - | FileCheck %s
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;; Expect architectural nop to be used between func2 and func3 but not func1
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;; and func2 due to lack of subtarget support in func2.
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define i32 @func1() #0 align 16 {
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entry:
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ret i32 0
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}
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define i32 @func2() #1 align 16 {
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entry:
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ret i32 0
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}
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define i32 @func3() #0 align 16 {
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entry:
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ret i32 0
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}
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attributes #0 = { "target-cpu"="generic" "target-features"="+armv7-a,+dsp,+neon,+vfp3,-thumb-mode" "use-soft-float"="false" }
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attributes #1 = { "target-cpu"="arm7tdmi" "target-features"="+armv4t" "use-soft-float"="true" }
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; CHECK: 00000000 <func1>:
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; CHECK-NEXT: 0: mov r0, #0
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; CHECK-NEXT: 4: bx lr
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; CHECK-NEXT: 8: mov r0, r0
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; CHECK-NEXT: c: mov r0, r0
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; CHECK: 00000010 <func2>:
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; CHECK-NEXT: 10: mov r0, #0
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; CHECK-NEXT: 14: bx lr
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; CHECK-NEXT: 18: nop
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; CHECK-NEXT: 1c: nop
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; CHECK: 00000020 <func3>:
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; CHECK-NEXT: 20: mov r0, #0
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; CHECK-NEXT: 24: bx lr
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