derek.holloway
7502bf64a4
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106 lines
5.0 KiB
LLVM
106 lines
5.0 KiB
LLVM
; RUN: opt -S -dxil-intrinsic-expansion -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s --check-prefixes=CHECK,EXPCHECK
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; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s --check-prefixes=CHECK,DOPCHECK
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; Make sure dxil operation function calls for dot are generated for int/uint vectors.
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; CHECK-LABEL: dot_int16_t2
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define noundef i16 @dot_int16_t2(<2 x i16> noundef %a, <2 x i16> noundef %b) {
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entry:
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; CHECK: extractelement <2 x i16> %a, i64 0
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; CHECK: extractelement <2 x i16> %b, i64 0
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; CHECK: mul i16 %{{.*}}, %{{.*}}
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; CHECK: extractelement <2 x i16> %a, i64 1
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; CHECK: extractelement <2 x i16> %b, i64 1
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; EXPCHECK: call i16 @llvm.dx.imad.i16(i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}})
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; DOPCHECK: call i16 @dx.op.tertiary.i16(i32 48, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}})
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%dot = call i16 @llvm.dx.sdot.v3i16(<2 x i16> %a, <2 x i16> %b)
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ret i16 %dot
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}
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; CHECK-LABEL: dot_int4
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define noundef i32 @dot_int4(<4 x i32> noundef %a, <4 x i32> noundef %b) {
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entry:
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; CHECK: extractelement <4 x i32> %a, i64 0
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; CHECK: extractelement <4 x i32> %b, i64 0
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; CHECK: mul i32 %{{.*}}, %{{.*}}
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; CHECK: extractelement <4 x i32> %a, i64 1
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; CHECK: extractelement <4 x i32> %b, i64 1
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; EXPCHECK: call i32 @llvm.dx.imad.i32(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; DOPCHECK: call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; CHECK: extractelement <4 x i32> %a, i64 2
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; CHECK: extractelement <4 x i32> %b, i64 2
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; EXPCHECK: call i32 @llvm.dx.imad.i32(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; DOPCHECK: call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; CHECK: extractelement <4 x i32> %a, i64 3
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; CHECK: extractelement <4 x i32> %b, i64 3
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; EXPCHECK: call i32 @llvm.dx.imad.i32(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; DOPCHECK: call i32 @dx.op.tertiary.i32(i32 48, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%dot = call i32 @llvm.dx.sdot.v4i32(<4 x i32> %a, <4 x i32> %b)
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ret i32 %dot
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}
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; CHECK-LABEL: dot_uint16_t3
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define noundef i16 @dot_uint16_t3(<3 x i16> noundef %a, <3 x i16> noundef %b) {
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entry:
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; CHECK: extractelement <3 x i16> %a, i64 0
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; CHECK: extractelement <3 x i16> %b, i64 0
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; CHECK: mul i16 %{{.*}}, %{{.*}}
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; CHECK: extractelement <3 x i16> %a, i64 1
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; CHECK: extractelement <3 x i16> %b, i64 1
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; EXPCHECK: call i16 @llvm.dx.umad.i16(i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}})
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; DOPCHECK: call i16 @dx.op.tertiary.i16(i32 49, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}})
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; CHECK: extractelement <3 x i16> %a, i64 2
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; CHECK: extractelement <3 x i16> %b, i64 2
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; EXPCHECK: call i16 @llvm.dx.umad.i16(i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}})
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; DOPCHECK: call i16 @dx.op.tertiary.i16(i32 49, i16 %{{.*}}, i16 %{{.*}}, i16 %{{.*}})
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%dot = call i16 @llvm.dx.udot.v3i16(<3 x i16> %a, <3 x i16> %b)
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ret i16 %dot
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}
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; CHECK-LABEL: dot_uint4
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define noundef i32 @dot_uint4(<4 x i32> noundef %a, <4 x i32> noundef %b) {
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entry:
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; CHECK: extractelement <4 x i32> %a, i64 0
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; CHECK: extractelement <4 x i32> %b, i64 0
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; CHECK: mul i32 %{{.*}}, %{{.*}}
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; CHECK: extractelement <4 x i32> %a, i64 1
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; CHECK: extractelement <4 x i32> %b, i64 1
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; EXPCHECK: call i32 @llvm.dx.umad.i32(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; DOPCHECK: call i32 @dx.op.tertiary.i32(i32 49, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; CHECK: extractelement <4 x i32> %a, i64 2
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; CHECK: extractelement <4 x i32> %b, i64 2
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; EXPCHECK: call i32 @llvm.dx.umad.i32(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; DOPCHECK: call i32 @dx.op.tertiary.i32(i32 49, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; CHECK: extractelement <4 x i32> %a, i64 3
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; CHECK: extractelement <4 x i32> %b, i64 3
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; EXPCHECK: call i32 @llvm.dx.umad.i32(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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; DOPCHECK: call i32 @dx.op.tertiary.i32(i32 49, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%dot = call i32 @llvm.dx.udot.v4i32(<4 x i32> %a, <4 x i32> %b)
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ret i32 %dot
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}
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; CHECK-LABEL: dot_uint64_t4
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define noundef i64 @dot_uint64_t4(<2 x i64> noundef %a, <2 x i64> noundef %b) {
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entry:
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; CHECK: extractelement <2 x i64> %a, i64 0
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; CHECK: extractelement <2 x i64> %b, i64 0
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; CHECK: mul i64 %{{.*}}, %{{.*}}
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; CHECK: extractelement <2 x i64> %a, i64 1
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; CHECK: extractelement <2 x i64> %b, i64 1
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; EXPCHECK: call i64 @llvm.dx.umad.i64(i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
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; DOPCHECK: call i64 @dx.op.tertiary.i64(i32 49, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
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%dot = call i64 @llvm.dx.udot.v2i64(<2 x i64> %a, <2 x i64> %b)
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ret i64 %dot
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}
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; DOPCHECK-DAG: declare i16 @dx.op.tertiary.i16(i32, i16, i16, i16) #[[#ATTR0:]]
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; DOPCHECK-DAG: declare i32 @dx.op.tertiary.i32(i32, i32, i32, i32) #[[#ATTR0]]
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; DOPCHECK-DAG: declare i64 @dx.op.tertiary.i64(i32, i64, i64, i64) #[[#ATTR0]]
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; DOPCHECK: attributes #[[#ATTR0]] = { nounwind memory(none) }
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declare i16 @llvm.dx.sdot.v2i16(<2 x i16>, <2 x i16>)
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declare i32 @llvm.dx.sdot.v4i32(<4 x i32>, <4 x i32>)
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declare i16 @llvm.dx.udot.v3i32(<3 x i16>, <3 x i16>)
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declare i32 @llvm.dx.udot.v4i32(<4 x i32>, <4 x i32>)
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declare i64 @llvm.dx.udot.v2i64(<2 x i64>, <2 x i64>)
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