derek.holloway
7502bf64a4
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57 lines
2.1 KiB
LLVM
57 lines
2.1 KiB
LLVM
; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.0-library < %s | FileCheck %s
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; Make sure dxil operation function calls for lerp are generated for float and half.
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; CHECK-LABEL: lerp_half
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; CHECK: fsub half %{{.*}}, %{{.*}}
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; CHECK: fmul half %{{.*}}, %{{.*}}
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; CHECK: fadd half %{{.*}}, %{{.*}}
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define noundef half @lerp_half(half noundef %p0) {
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entry:
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%p0.addr = alloca half, align 2
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store half %p0, ptr %p0.addr, align 2
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%0 = load half, ptr %p0.addr, align 2
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%1 = load half, ptr %p0.addr, align 2
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%2 = load half, ptr %p0.addr, align 2
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%dx.lerp = call half @llvm.dx.lerp.f16(half %0, half %1, half %2)
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ret half %dx.lerp
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}
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; CHECK-LABEL: lerp_float
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; CHECK: fsub float %{{.*}}, %{{.*}}
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; CHECK: fmul float %{{.*}}, %{{.*}}
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; CHECK: fadd float %{{.*}}, %{{.*}}
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define noundef float @lerp_float(float noundef %p0, float noundef %p1) {
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entry:
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%p1.addr = alloca float, align 4
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%p0.addr = alloca float, align 4
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store float %p1, ptr %p1.addr, align 4
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store float %p0, ptr %p0.addr, align 4
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%0 = load float, ptr %p0.addr, align 4
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%1 = load float, ptr %p0.addr, align 4
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%2 = load float, ptr %p0.addr, align 4
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%dx.lerp = call float @llvm.dx.lerp.f32(float %0, float %1, float %2)
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ret float %dx.lerp
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}
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; CHECK-LABEL: lerp_float4
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; CHECK: fsub <4 x float> %{{.*}}, %{{.*}}
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; CHECK: fmul <4 x float> %{{.*}}, %{{.*}}
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; CHECK: fadd <4 x float> %{{.*}}, %{{.*}}
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define noundef <4 x float> @lerp_float4(<4 x float> noundef %p0, <4 x float> noundef %p1) {
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entry:
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%p1.addr = alloca <4 x float>, align 16
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%p0.addr = alloca <4 x float>, align 16
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store <4 x float> %p1, ptr %p1.addr, align 16
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store <4 x float> %p0, ptr %p0.addr, align 16
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%0 = load <4 x float>, ptr %p0.addr, align 16
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%1 = load <4 x float>, ptr %p0.addr, align 16
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%2 = load <4 x float>, ptr %p0.addr, align 16
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%dx.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %0, <4 x float> %1, <4 x float> %2)
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ret <4 x float> %dx.lerp
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}
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declare half @llvm.dx.lerp.f16(half, half, half)
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declare float @llvm.dx.lerp.f32(float, float, float)
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declare <4 x float> @llvm.dx.lerp.v4f32(<4 x float>, <4 x float>, <4 x float>)
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