derek.holloway
7502bf64a4
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111 lines
3.4 KiB
LLVM
111 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s
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; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown -verify-machineinstrs \
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s --check-prefix=CHECK-BE
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; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s \
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; RUN: -check-prefix=CHECK-P8
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; Function Attrs: norecurse nounwind readnone
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define i64 @getPart1(fp128 %in) local_unnamed_addr {
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; CHECK-LABEL: getPart1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mfvsrld r3, v2
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; CHECK-NEXT: blr
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;
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; CHECK-BE-LABEL: getPart1:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: mfvsrld r3, v2
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; CHECK-BE-NEXT: blr
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;
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; CHECK-P8-LABEL: getPart1:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: xxswapd vs0, v2
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; CHECK-P8-NEXT: mffprd r3, f0
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; CHECK-P8-NEXT: blr
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entry:
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%0 = bitcast fp128 %in to i128
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%a.sroa.0.0.extract.trunc = trunc i128 %0 to i64
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ret i64 %a.sroa.0.0.extract.trunc
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}
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; Function Attrs: norecurse nounwind readnone
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define i64 @getPart2(fp128 %in) local_unnamed_addr {
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; CHECK-LABEL: getPart2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mfvsrd r3, v2
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; CHECK-NEXT: blr
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;
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; CHECK-BE-LABEL: getPart2:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: mfvsrd r3, v2
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; CHECK-BE-NEXT: blr
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;
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; CHECK-P8-LABEL: getPart2:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: mfvsrd r3, v2
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; CHECK-P8-NEXT: blr
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entry:
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%0 = bitcast fp128 %in to i128
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%a.sroa.0.8.extract.shift = lshr i128 %0, 64
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%a.sroa.0.8.extract.trunc = trunc i128 %a.sroa.0.8.extract.shift to i64
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ret i64 %a.sroa.0.8.extract.trunc
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}
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; Function Attrs: norecurse nounwind readnone
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define i64 @checkBitcast(fp128 %in, <2 x i64> %in2, ptr %out) local_unnamed_addr {
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; CHECK-LABEL: checkBitcast:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mfvsrld r3, v2
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; CHECK-NEXT: vaddudm v2, v2, v3
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; CHECK-NEXT: stxv v2, 0(r7)
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; CHECK-NEXT: blr
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;
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; CHECK-BE-LABEL: checkBitcast:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: mfvsrd r3, v2
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; CHECK-BE-NEXT: vaddudm v2, v2, v3
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; CHECK-BE-NEXT: stxv v2, 0(r7)
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; CHECK-BE-NEXT: blr
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;
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; CHECK-P8-LABEL: checkBitcast:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: xxswapd vs0, v2
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; CHECK-P8-NEXT: vaddudm v2, v2, v3
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; CHECK-P8-NEXT: mffprd r3, f0
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; CHECK-P8-NEXT: xxswapd vs1, v2
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; CHECK-P8-NEXT: stxvd2x vs1, 0, r7
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; CHECK-P8-NEXT: blr
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entry:
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%0 = bitcast fp128 %in to <2 x i64>
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%1 = extractelement <2 x i64> %0, i64 0
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%2 = add <2 x i64> %0, %in2
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store <2 x i64> %2, ptr %out, align 16
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ret i64 %1
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}
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define <4 x i32> @truncBitcast(i512 %a) {
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; CHECK-LABEL: truncBitcast:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mtvsrdd v2, r4, r3
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; CHECK-NEXT: blr
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;
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; CHECK-BE-LABEL: truncBitcast:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: mtvsrdd v2, r9, r10
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; CHECK-BE-NEXT: blr
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;
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; CHECK-P8-LABEL: truncBitcast:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: mtfprd f0, r3
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; CHECK-P8-NEXT: mtfprd f1, r4
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; CHECK-P8-NEXT: xxmrghd v2, vs1, vs0
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; CHECK-P8-NEXT: blr
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entry:
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%0 = trunc i512 %a to i128
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%1 = bitcast i128 %0 to <4 x i32>
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ret <4 x i32> %1
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}
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