derek.holloway
7502bf64a4
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78 lines
3.0 KiB
LLVM
78 lines
3.0 KiB
LLVM
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; OpSelect: condition and object component counts must match.
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; CHECK-DAG: %[[#Bool:]] = OpTypeBool
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; CHECK-DAG: %[[#I32:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#F32:]] = OpTypeFloat 32
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; CHECK-DAG: %[[#I8:]] = OpTypeInt 8 0
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; CHECK-DAG: %[[#PtrI8:]] = OpTypePointer Function %[[#I8]]
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; CHECK-DAG: %[[#V4I32:]] = OpTypeVector %[[#I32]] 4
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; CHECK-DAG: %[[#V4F32:]] = OpTypeVector %[[#F32]] 4
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; CHECK-DAG: %[[#V4Bool:]] = OpTypeVector %[[#Bool]] 4
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; Scalar result, scalar cond.
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; CHECK: OpFunction
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; CHECK: %[[#SC:]] = OpFunctionParameter %[[#Bool]]
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; CHECK: %[[#SA:]] = OpFunctionParameter %[[#I32]]
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; CHECK: %[[#SB:]] = OpFunctionParameter %[[#I32]]
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; CHECK: %{{[0-9]+}} = OpSelect %[[#I32]] %[[#SC]] %[[#SA]] %[[#SB]]
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define i32 @sel_i32_scond(i1 %c, i32 %a, i32 %b) {
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%r = select i1 %c, i32 %a, i32 %b
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ret i32 %r
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}
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; CHECK: OpFunction
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; CHECK: %[[#FC:]] = OpFunctionParameter %[[#Bool]]
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; CHECK: %[[#FA:]] = OpFunctionParameter %[[#F32]]
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; CHECK: %[[#FB:]] = OpFunctionParameter %[[#F32]]
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; CHECK: %{{[0-9]+}} = OpSelect %[[#F32]] %[[#FC]] %[[#FA]] %[[#FB]]
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define float @sel_f32_scond(i1 %c, float %a, float %b) {
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%r = select i1 %c, float %a, float %b
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ret float %r
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}
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; CHECK: OpFunction
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; CHECK: %[[#PC:]] = OpFunctionParameter %[[#Bool]]
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; CHECK: %[[#PA:]] = OpFunctionParameter %[[#PtrI8]]
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; CHECK: %[[#PB:]] = OpFunctionParameter %[[#PtrI8]]
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; CHECK: %{{[0-9]+}} = OpSelect %[[#PtrI8]] %[[#PC]] %[[#PA]] %[[#PB]]
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define ptr @sel_ptr_scond(i1 %c, ptr %a, ptr %b) {
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%r = select i1 %c, ptr %a, ptr %b
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ret ptr %r
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}
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; Vector result, scalar (broadcast) cond.
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; CHECK: OpFunction
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; CHECK: %[[#VSC:]] = OpFunctionParameter %[[#Bool]]
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; CHECK: %[[#VSA:]] = OpFunctionParameter %[[#V4I32]]
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; CHECK: %[[#VSB:]] = OpFunctionParameter %[[#V4I32]]
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; CHECK: %{{[0-9]+}} = OpSelect %[[#V4I32]] %[[#VSC]] %[[#VSA]] %[[#VSB]]
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define <4 x i32> @sel_v4i32_scond(i1 %c, <4 x i32> %a, <4 x i32> %b) {
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%r = select i1 %c, <4 x i32> %a, <4 x i32> %b
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ret <4 x i32> %r
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}
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; Vector result, vector cond.
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; CHECK: OpFunction
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; CHECK: %[[#VVIC:]] = OpFunctionParameter %[[#V4Bool]]
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; CHECK: %[[#VVIA:]] = OpFunctionParameter %[[#V4I32]]
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; CHECK: %[[#VVIB:]] = OpFunctionParameter %[[#V4I32]]
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; CHECK: %{{[0-9]+}} = OpSelect %[[#V4I32]] %[[#VVIC]] %[[#VVIA]] %[[#VVIB]]
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define <4 x i32> @sel_v4i32_vcond(<4 x i1> %c, <4 x i32> %a, <4 x i32> %b) {
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%r = select <4 x i1> %c, <4 x i32> %a, <4 x i32> %b
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ret <4 x i32> %r
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}
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; CHECK: OpFunction
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; CHECK: %[[#VVFC:]] = OpFunctionParameter %[[#V4Bool]]
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; CHECK: %[[#VVFA:]] = OpFunctionParameter %[[#V4F32]]
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; CHECK: %[[#VVFB:]] = OpFunctionParameter %[[#V4F32]]
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; CHECK: %{{[0-9]+}} = OpSelect %[[#V4F32]] %[[#VVFC]] %[[#VVFA]] %[[#VVFB]]
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define <4 x float> @sel_v4f32_vcond(<4 x i1> %c, <4 x float> %a, <4 x float> %b) {
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%r = select <4 x i1> %c, <4 x float> %a, <4 x float> %b
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ret <4 x float> %r
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}
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