derek.holloway
7502bf64a4
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289 lines
8.4 KiB
LLVM
289 lines
8.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-sse -verify-machineinstrs < %s | FileCheck %s -check-prefix=X86-NOSSE
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; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse -verify-machineinstrs < %s | FileCheck %s -check-prefix=X86-SSE
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=X64
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declare void @llvm.set.rounding(i32 %x)
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declare i256 @llvm.get.fpenv.i256()
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declare void @llvm.set.fpenv.i256(i256 %fpenv)
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declare void @llvm.reset.fpenv()
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declare i32 @llvm.get.fpmode.i32()
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declare void @llvm.set.fpmode.i32(i32 %fpmode)
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declare void @llvm.reset.fpmode()
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define void @get_fpenv_01(ptr %ptr) #0 {
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; X86-NOSSE-LABEL: get_fpenv_01:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: subl $60, %esp
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl %eax, (%esp)
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; X86-NOSSE-NEXT: calll fegetenv
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; X86-NOSSE-NEXT: addl $60, %esp
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE-LABEL: get_fpenv_01:
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; X86-SSE: # %bb.0: # %entry
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; X86-SSE-NEXT: subl $60, %esp
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: movl %eax, (%esp)
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; X86-SSE-NEXT: calll fegetenv
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; X86-SSE-NEXT: addl $60, %esp
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: get_fpenv_01:
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; X64: # %bb.0: # %entry
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; X64-NEXT: subq $40, %rsp
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; X64-NEXT: callq fegetenv@PLT
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; X64-NEXT: addq $40, %rsp
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; X64-NEXT: retq
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entry:
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%env = call i256 @llvm.get.fpenv.i256()
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store i256 %env, ptr %ptr
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ret void
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}
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define void @get_fpenv_01_native(ptr %ptr) nounwind {
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; X86-NOSSE-LABEL: get_fpenv_01_native:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: subl $44, %esp
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: fnstenv (%eax)
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; X86-NOSSE-NEXT: fldenv (%eax)
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; X86-NOSSE-NEXT: addl $44, %esp
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE-LABEL: get_fpenv_01_native:
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; X86-SSE: # %bb.0: # %entry
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; X86-SSE-NEXT: subl $44, %esp
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: fnstenv (%eax)
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; X86-SSE-NEXT: fldenv (%eax)
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; X86-SSE-NEXT: stmxcsr 28(%eax)
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; X86-SSE-NEXT: addl $44, %esp
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: get_fpenv_01_native:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fnstenv (%rdi)
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; X64-NEXT: fldenv (%rdi)
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; X64-NEXT: stmxcsr 28(%rdi)
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; X64-NEXT: retq
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entry:
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%env = call i256 @llvm.get.fpenv.i256()
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store i256 %env, ptr %ptr
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ret void
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}
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define void @set_fpenv_01(ptr %ptr) #0 {
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; X86-NOSSE-LABEL: set_fpenv_01:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: subl $60, %esp
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl %eax, (%esp)
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; X86-NOSSE-NEXT: calll fesetenv
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; X86-NOSSE-NEXT: addl $60, %esp
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE-LABEL: set_fpenv_01:
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; X86-SSE: # %bb.0: # %entry
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; X86-SSE-NEXT: subl $60, %esp
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: movl %eax, (%esp)
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; X86-SSE-NEXT: calll fesetenv
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; X86-SSE-NEXT: addl $60, %esp
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: set_fpenv_01:
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; X64: # %bb.0: # %entry
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; X64-NEXT: subq $40, %rsp
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; X64-NEXT: callq fesetenv@PLT
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; X64-NEXT: addq $40, %rsp
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; X64-NEXT: retq
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entry:
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%env = load i256, ptr %ptr
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call void @llvm.set.fpenv.i256(i256 %env)
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ret void
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}
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define void @set_fpenv_01_native(ptr %ptr) nounwind {
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; X86-NOSSE-LABEL: set_fpenv_01_native:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: subl $44, %esp
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: fldenv (%eax)
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; X86-NOSSE-NEXT: addl $44, %esp
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE-LABEL: set_fpenv_01_native:
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; X86-SSE: # %bb.0: # %entry
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; X86-SSE-NEXT: subl $44, %esp
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: fldenv (%eax)
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; X86-SSE-NEXT: ldmxcsr 28(%eax)
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; X86-SSE-NEXT: addl $44, %esp
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: set_fpenv_01_native:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fldenv (%rdi)
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; X64-NEXT: ldmxcsr 28(%rdi)
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; X64-NEXT: retq
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entry:
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%env = load i256, ptr %ptr
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call void @llvm.set.fpenv.i256(i256 %env)
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ret void
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}
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define void @reset_fpenv_01() #0 {
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; X86-NOSSE-LABEL: reset_fpenv_01:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: subl $12, %esp
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; X86-NOSSE-NEXT: movl $-1, (%esp)
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; X86-NOSSE-NEXT: calll fesetenv
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; X86-NOSSE-NEXT: addl $12, %esp
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE-LABEL: reset_fpenv_01:
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; X86-SSE: # %bb.0: # %entry
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; X86-SSE-NEXT: subl $12, %esp
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; X86-SSE-NEXT: movl $-1, (%esp)
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; X86-SSE-NEXT: calll fesetenv
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; X86-SSE-NEXT: addl $12, %esp
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: reset_fpenv_01:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pushq %rax
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; X64-NEXT: movq $-1, %rdi
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; X64-NEXT: callq fesetenv@PLT
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; X64-NEXT: popq %rax
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; X64-NEXT: retq
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entry:
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call void @llvm.reset.fpenv()
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ret void
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}
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define void @reset_fpenv_01_native() nounwind {
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; X86-NOSSE-LABEL: reset_fpenv_01_native:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: fldenv {{\.?LCPI[0-9]+_[0-9]+}}
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE-LABEL: reset_fpenv_01_native:
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; X86-SSE: # %bb.0: # %entry
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; X86-SSE-NEXT: fldenv {{\.?LCPI[0-9]+_[0-9]+}}
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; X86-SSE-NEXT: ldmxcsr {{\.?LCPI[0-9]+_[0-9]+}}+28
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: reset_fpenv_01_native:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fldenv {{\.?LCPI[0-9]+_[0-9]+}}(%rip)
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; X64-NEXT: ldmxcsr {{\.?LCPI[0-9]+_[0-9]+}}+28(%rip)
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; X64-NEXT: retq
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entry:
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call void @llvm.reset.fpenv()
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ret void
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}
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define i32 @func_get_fpmode() #0 {
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; X86-NOSSE-LABEL: func_get_fpmode:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: subl $12, %esp
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; X86-NOSSE-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl %eax, (%esp)
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; X86-NOSSE-NEXT: calll fegetmode
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: addl $12, %esp
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE-LABEL: func_get_fpmode:
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; X86-SSE: # %bb.0: # %entry
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; X86-SSE-NEXT: subl $12, %esp
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; X86-SSE-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: movl %eax, (%esp)
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; X86-SSE-NEXT: calll fegetmode
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: addl $12, %esp
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: func_get_fpmode:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pushq %rax
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; X64-NEXT: leaq {{[0-9]+}}(%rsp), %rdi
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; X64-NEXT: callq fegetmode@PLT
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; X64-NEXT: movl {{[0-9]+}}(%rsp), %eax
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; X64-NEXT: popq %rcx
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; X64-NEXT: retq
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entry:
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%fpmode = call i32 @llvm.get.fpmode.i32()
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ret i32 %fpmode
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}
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define void @func_set_fpmode(i32 %fpmode) #0 {
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; X86-NOSSE-LABEL: func_set_fpmode:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: subl $12, %esp
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl %eax, (%esp)
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; X86-NOSSE-NEXT: calll fesetmode
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; X86-NOSSE-NEXT: addl $12, %esp
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE-LABEL: func_set_fpmode:
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; X86-SSE: # %bb.0: # %entry
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; X86-SSE-NEXT: subl $12, %esp
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; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X86-SSE-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X86-SSE-NEXT: movl %eax, (%esp)
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; X86-SSE-NEXT: calll fesetmode
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; X86-SSE-NEXT: addl $12, %esp
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: func_set_fpmode:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pushq %rax
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; X64-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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; X64-NEXT: leaq {{[0-9]+}}(%rsp), %rdi
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; X64-NEXT: callq fesetmode@PLT
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; X64-NEXT: popq %rax
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; X64-NEXT: retq
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entry:
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call void @llvm.set.fpmode.i32(i32 %fpmode)
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ret void
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}
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define void @func_reset() #0 {
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; X86-NOSSE-LABEL: func_reset:
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; X86-NOSSE: # %bb.0: # %entry
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; X86-NOSSE-NEXT: subl $12, %esp
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; X86-NOSSE-NEXT: movl $-1, (%esp)
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; X86-NOSSE-NEXT: calll fesetmode
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; X86-NOSSE-NEXT: addl $12, %esp
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; X86-NOSSE-NEXT: retl
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;
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; X86-SSE-LABEL: func_reset:
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; X86-SSE: # %bb.0: # %entry
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; X86-SSE-NEXT: subl $12, %esp
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; X86-SSE-NEXT: movl $-1, (%esp)
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; X86-SSE-NEXT: calll fesetmode
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; X86-SSE-NEXT: addl $12, %esp
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; X86-SSE-NEXT: retl
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;
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; X64-LABEL: func_reset:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pushq %rax
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; X64-NEXT: movq $-1, %rdi
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; X64-NEXT: callq fesetmode@PLT
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; X64-NEXT: popq %rax
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; X64-NEXT: retq
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entry:
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call void @llvm.reset.fpmode()
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ret void
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}
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attributes #0 = { nounwind "use-soft-float"="true" }
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