derek.holloway
7502bf64a4
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72 lines
3.0 KiB
Bash
72 lines
3.0 KiB
Bash
source_sh ${srcdir}/emulparams/elf32ppccommon.sh
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source_sh ${srcdir}/emulparams/plt_unwind.sh
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source_sh ${srcdir}/emulparams/dt-relr.sh
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EXTRA_EM_FILE=ppc64elf
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ELFSIZE=64
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OUTPUT_FORMAT="elf64-powerpc"
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TEXT_START_ADDR=0x10000000
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#SEGMENT_SIZE=0x10000000
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ARCH=powerpc:common64
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unset EXECUTABLE_SYMBOLS
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unset SDATA_START_SYMBOLS
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unset SDATA2_START_SYMBOLS
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unset SBSS_START_SYMBOLS
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unset SBSS_END_SYMBOLS
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unset OTHER_END_SYMBOLS
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unset OTHER_RELRO_SECTIONS
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OTHER_TEXT_SECTIONS="*(.sfpr .glink)"
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OTHER_SDATA_SECTIONS="
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.tocbss ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.tocbss)}"
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if test x${RELOCATING+set} = xset; then
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GOT="
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.got : ALIGN(256) { *(.got .toc) }"
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else
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GOT="
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.got 0 : { *(.got) }
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.toc 0 : { *(.toc) }"
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fi
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# Put .opd relocs first so ld.so will process them before any ifunc relocs.
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INITIAL_RELOC_SECTIONS="
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.rela.opd ${RELOCATING-0} : { *(.rela.opd) }"
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OTHER_GOT_RELOC_SECTIONS="
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.rela.toc ${RELOCATING-0} : { *(.rela.toc) }
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.rela.toc1 ${RELOCATING-0} : { *(.rela.toc1) }
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.rela.tocbss ${RELOCATING-0} : { *(.rela.tocbss) }
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.rela.branch_lt ${RELOCATING-0} : { *(.rela.branch_lt) }"
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# The idea behind setting .branch_lt address as we do below is to put
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# it up against .got which is 256 byte aligned, so that the offset
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# from .TOC. to an entry in .branch_lt remains fixed after stub
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# sizing. (.eh_frame is edited late.) When -z relro -z now, we have
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# .branch_lt, .plt, .iplt, then .got, so in that case we move
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# .branch_lt so that the end of .iplt is against .got. All of these
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# sections are linker generated, with alignment eight and size a
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# multiple of eight, but a user playing games with their own
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# .branch_lt, .plt or .iplt sections can result in unexpected
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# alignment or size. Cope with that anyway. Note that if user
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# alignment of .branch_lt is 256 or more then nothing special need be
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# done.
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#
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# To understand what is going on here consider that the end address
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# of .iplt should be 0 mod 256, so the start of .iplt should be
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# -sizeof(.iplt) mod 256. But the start is constrained by alignment,
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# so goes down to (-alignof(.iplt) & -sizeof(.iplt)) mod 256. Repeat
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# that calculation for .plt and .branch_lt to find the start of
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# .branch_lt then subtract . mod 256 to find the padding. Of course
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# just one mod 256 suffices, which is done by anding with 255.
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OTHER_RELRO_SECTIONS_2="
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.opd ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { KEEP (*(.opd)) }
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.toc1 ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc1) }
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.branch_lt ${RELOCATING-0}${RELOCATING+ALIGNOF(.branch_lt) < 256 && SIZEOF(.got) != 0 ? . + (((-MAX(ALIGNOF(.branch_lt),8) & (-SIZEOF(.branch_lt)${RELRO_NOW+ + (-MAX(ALIGNOF(.plt),8) & (-SIZEOF(.plt) + (-MAX(ALIGNOF(.iplt),8) & -SIZEOF(.iplt))))})) - .) & 255) : ALIGN(MAX(ALIGNOF(.branch_lt), SIZEOF(.got) != 0 ? 256 : 8))} : { *(.branch_lt) }"
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INITIAL_READWRITE_SECTIONS="
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.toc ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc) }"
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# Put .got before .data
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DATA_GOT=" "
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# Always make .got read-only after relocation
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SEPARATE_GOTPLT=0
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# Also put .sdata before .data
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DATA_SDATA=" "
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# and .plt/.iplt before .data
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DATA_PLT=
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PLT_BEFORE_GOT=" "
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