derek.holloway
7502bf64a4
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150 lines
2.1 KiB
ArmAsm
150 lines
2.1 KiB
ArmAsm
# sh testcase for float
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# mach: sh
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# as(sh): -defsym sim_cpu=0
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.include "testutils.inc"
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start
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float_pos:
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set_grs_a5a5
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set_fprs_a5a5
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single_prec
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mov #3, r0
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lds r0, fpul
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float fpul, fr2
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# Check the result.
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fldi1 fr0
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fldi1 fr1
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fadd fr0, fr1
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fadd fr0, fr1
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fcmp/eq fr1, fr2
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bt float_neg
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fail
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float_neg:
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mov #3, r0
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neg r0, r0
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lds r0, fpul
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float fpul, fr2
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# Check the result.
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fldi1 fr0
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fldi1 fr1
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fadd fr0, fr1
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fadd fr0, fr1
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fneg fr1
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fcmp/eq fr1, fr2
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bt .L0
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fail
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.L0:
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assertreg0 -3
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test_gr_a5a5 r1
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test_gr_a5a5 r2
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test_gr_a5a5 r3
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test_gr_a5a5 r4
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test_gr_a5a5 r5
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test_gr_a5a5 r6
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test_gr_a5a5 r7
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test_gr_a5a5 r8
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test_gr_a5a5 r9
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test_gr_a5a5 r10
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test_gr_a5a5 r11
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test_gr_a5a5 r12
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test_gr_a5a5 r13
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test_gr_a5a5 r14
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assert_fpreg_i 1, fr0
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assert_fpreg_i -3, fr1
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assert_fpreg_i -3, fr2
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test_fpr_a5a5 fr3
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test_fpr_a5a5 fr4
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test_fpr_a5a5 fr5
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test_fpr_a5a5 fr6
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test_fpr_a5a5 fr7
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test_fpr_a5a5 fr8
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test_fpr_a5a5 fr9
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test_fpr_a5a5 fr10
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test_fpr_a5a5 fr11
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test_fpr_a5a5 fr12
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test_fpr_a5a5 fr13
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test_fpr_a5a5 fr14
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test_fpr_a5a5 fr15
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double_pos:
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set_grs_a5a5
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set_fprs_a5a5
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double_prec
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mov #3, r0
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lds r0, fpul
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float fpul, dr4
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# check the result.
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fldi1 fr0
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fldi1 fr1
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single_prec
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fadd fr0, fr1
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fadd fr0, fr1
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double_prec
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_s2d fr1, dr2
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fcmp/eq dr2, dr4
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bt double_neg
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fail
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double_neg:
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double_prec
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mov #3, r0
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neg r0, r0
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lds r0, fpul
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float fpul, dr4
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# check the result.
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fldi1 fr0
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fldi1 fr1
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single_prec
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fadd fr0, fr1
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fadd fr0, fr1
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fneg fr1
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double_prec
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_s2d fr1, dr2
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fcmp/eq dr2, dr4
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bt .L2
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fail
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.L2:
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assertreg0 -3
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test_gr_a5a5 r1
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test_gr_a5a5 r2
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test_gr_a5a5 r3
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test_gr_a5a5 r4
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test_gr_a5a5 r5
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test_gr_a5a5 r6
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test_gr_a5a5 r7
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test_gr_a5a5 r8
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test_gr_a5a5 r9
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test_gr_a5a5 r10
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test_gr_a5a5 r11
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test_gr_a5a5 r12
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test_gr_a5a5 r13
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test_gr_a5a5 r14
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single_prec
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assert_fpreg_i 1, fr0
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assert_fpreg_i -3, fr1
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double_prec
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assert_dpreg_i -3, dr2
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assert_dpreg_i -3, dr4
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test_fpr_a5a5 fr6
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test_fpr_a5a5 fr7
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test_fpr_a5a5 fr8
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test_fpr_a5a5 fr9
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test_fpr_a5a5 fr10
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test_fpr_a5a5 fr11
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test_fpr_a5a5 fr12
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test_fpr_a5a5 fr13
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test_fpr_a5a5 fr14
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test_fpr_a5a5 fr15
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pass
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exit 0
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