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153 lines
6.0 KiB
C++
153 lines
6.0 KiB
C++
// Copyright Advanced Micro Devices, Inc., or its affiliates.
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// SPDX-License-Identifier: MIT
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#include <rocRoller/CodeGen/AddInstruction.hpp>
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namespace rocRoller
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{
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Instruction ScalarAddInt32(ContextPtr ctx,
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Register::ValuePtr dest,
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Register::ValuePtr lhs,
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Register::ValuePtr rhs,
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std::string comment)
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{
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auto const& arch = ctx->targetArchitecture();
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if(arch.HasCapability(GPUCapability::HasExplicitScalarCO))
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{
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return Instruction("s_add_co_i32", {dest}, {lhs, rhs}, {}, comment);
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}
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else
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{
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return Instruction("s_add_i32", {dest}, {lhs, rhs}, {}, comment);
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}
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}
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Instruction ScalarAddUInt32(ContextPtr ctx,
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Register::ValuePtr dest,
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Register::ValuePtr lhs,
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Register::ValuePtr rhs,
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std::string comment)
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{
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auto const& arch = ctx->targetArchitecture();
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if(arch.HasCapability(GPUCapability::HasExplicitScalarCO))
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{
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return Instruction("s_add_co_u32", {dest}, {lhs, rhs}, {}, comment);
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}
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else
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{
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return Instruction("s_add_u32", {dest}, {lhs, rhs}, {}, comment);
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}
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}
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Instruction ScalarAddUInt32CarryInOut(ContextPtr ctx,
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Register::ValuePtr dest,
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Register::ValuePtr lhs,
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Register::ValuePtr rhs,
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std::string comment)
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{
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auto const& arch = ctx->targetArchitecture();
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if(arch.HasCapability(GPUCapability::HasExplicitScalarCOCI))
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{
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return Instruction("s_add_co_ci_u32", {dest}, {lhs, rhs}, {}, comment);
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}
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else
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{
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return Instruction("s_addc_u32", {dest}, {lhs, rhs}, {}, comment);
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}
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}
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Instruction VectorAddUInt32(ContextPtr ctx,
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Register::ValuePtr dest,
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Register::ValuePtr lhs,
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Register::ValuePtr rhs,
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std::string comment)
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{
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auto const& arch = ctx->targetArchitecture();
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if(arch.HasCapability(GPUCapability::HasExplicitNC))
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{
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return Instruction("v_add_nc_u32", {dest}, {lhs, rhs}, {}, comment);
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}
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else
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{
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return Instruction("v_add_u32", {dest}, {lhs, rhs}, {}, comment);
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}
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}
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Instruction VectorAddUInt32CarryOut(ContextPtr ctx,
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Register::ValuePtr dest,
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Register::ValuePtr carry,
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Register::ValuePtr lhs,
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Register::ValuePtr rhs,
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std::string comment)
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{
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auto const& arch = ctx->targetArchitecture();
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if(arch.HasCapability(GPUCapability::HasExplicitVectorCO))
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{
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return Instruction("v_add_co_u32", {dest, carry}, {lhs, rhs}, {}, comment);
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}
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else
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{
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Throw<FatalError>(fmt::format("VectorAddUInt32CarryOut not implemented for {}.\n",
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arch.target().toString()));
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}
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}
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Instruction VectorAddUInt32CarryOut(ContextPtr ctx,
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Register::ValuePtr dest,
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Register::ValuePtr lhs,
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Register::ValuePtr rhs,
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std::string comment)
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{
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return VectorAddUInt32CarryOut(ctx, dest, ctx->getVCC(), lhs, rhs);
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}
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Instruction VectorAddUInt32CarryInOut(ContextPtr ctx,
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Register::ValuePtr dest,
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Register::ValuePtr carryOut,
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Register::ValuePtr carryIn,
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Register::ValuePtr lhs,
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Register::ValuePtr rhs,
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std::string comment)
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{
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auto const& arch = ctx->targetArchitecture();
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if(arch.HasCapability(GPUCapability::HasExplicitVectorCOCI))
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{
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return Instruction(
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"v_add_co_ci_u32", {dest, carryOut}, {lhs, rhs, carryIn}, {}, comment);
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}
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else
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{
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return Instruction("v_addc_co_u32", {dest, carryOut}, {lhs, rhs, carryIn}, {}, comment);
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}
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}
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Instruction VectorAddUInt32CarryInOut(ContextPtr ctx,
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Register::ValuePtr dest,
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Register::ValuePtr lhs,
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Register::ValuePtr rhs,
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std::string comment)
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{
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auto vcc = ctx->getVCC();
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return VectorAddUInt32CarryInOut(ctx, dest, vcc, vcc, lhs, rhs);
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}
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Instruction VectorAdd3UInt32(ContextPtr ctx,
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Register::ValuePtr dest,
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Register::ValuePtr lhs,
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Register::ValuePtr rhs1,
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Register::ValuePtr rhs2,
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std::string comment)
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{
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auto const& arch = ctx->targetArchitecture();
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if(arch.HasCapability(GPUCapability::v_add3_u32))
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{
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return Instruction("v_add3_u32", {dest}, {lhs, rhs1, rhs2}, {}, comment);
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}
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else
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{
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Throw<FatalError>(fmt::format("VectorAdd3UInt32 not implemented for {}.\n",
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arch.target().toString()));
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}
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}
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}
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